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[/] [t48/] [tags/] [rel_1_1/] [sw/] [verif/] - Rev 141

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Rev Log message Author Age Path
141 disable external memory to avoid conflicts with outl a, bus arniml 7200d 21h /t48/tags/rel_1_1/sw/verif/
131 update arniml 7244d 16h /t48/tags/rel_1_1/sw/verif/
130 initial check-in arniml 7244d 16h /t48/tags/rel_1_1/sw/verif/
125 exclude from dump compare arniml 7314d 04h /t48/tags/rel_1_1/sw/verif/
122 test MB after return from interrupt arniml 7315d 02h /t48/tags/rel_1_1/sw/verif/
118 test MB/interrupt behaviour according to bug report
"Program Memory bank can be switched during interrupt"
arniml 7317d 19h /t48/tags/rel_1_1/sw/verif/
113 generate two ROM files based on address:
+ 0 - 2047 : 2k internal ROM
+ 2048 - 4095 : 2k external ROM
arniml 7358d 05h /t48/tags/rel_1_1/sw/verif/
102 update for changes in address space of external memory arniml 7362d 02h /t48/tags/rel_1_1/sw/verif/
99 initial check-in arniml 7362d 02h /t48/tags/rel_1_1/sw/verif/
97 initial check-in arniml 7362d 03h /t48/tags/rel_1_1/sw/verif/
95 check counter inactivity arniml 7363d 00h /t48/tags/rel_1_1/sw/verif/
94 initial check-in arniml 7363d 00h /t48/tags/rel_1_1/sw/verif/
90 intial check-in arniml 7363d 01h /t48/tags/rel_1_1/sw/verif/
89 initial check-in arniml 7376d 21h /t48/tags/rel_1_1/sw/verif/
87 abort gracfullt if memory bank switching does not work arniml 7377d 23h /t48/tags/rel_1_1/sw/verif/
85 initial check-in arniml 7378d 04h /t48/tags/rel_1_1/sw/verif/
57 abort if no interrupt occurs arniml 7393d 18h /t48/tags/rel_1_1/sw/verif/
46 fix test arniml 7401d 18h /t48/tags/rel_1_1/sw/verif/
42 change test values that match better to the test case arniml 7402d 22h /t48/tags/rel_1_1/sw/verif/
39 initial check-in arniml 7405d 02h /t48/tags/rel_1_1/sw/verif/

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