URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_2/] - Rev 292

Rev	Log message	Author	Age	Path
292	New directory structure.	root	5626d 11h	/t48/tags/rel_1_2/
291	remove t48_opc_decoder component reference	arniml	5938d 00h	/tags/rel_1_2/
290	remove obsolete components	arniml	5939d 01h	/tags/rel_1_2/
288	updates for release 1.1	arniml	5939d 22h	/tags/rel_1_2/
287	add notes on FPGA implementation	arniml	5939d 22h	/tags/rel_1_2/
286	hierarchy update, RAM and ROM clarification	arniml	5939d 23h	/tags/rel_1_2/
285	generate D for synchronous implementation in clocked process	arniml	5941d 00h	/tags/rel_1_2/
284	better support for ISE/XST: opc_table and opc_decoder merged into decoder_pack and decoder	arniml	5941d 00h	/tags/rel_1_2/
283	update to new mnemonic decoder	arniml	5941d 00h	/tags/rel_1_2/
282	decouple bidir port T0 from P1 fixes testcase black_box/tx/t0	arniml	5941d 23h	/tags/rel_1_2/
281	clarify testcase compilation	arniml	5941d 23h	/tags/rel_1_2/
280	added syn directory structure	arniml	5942d 22h	/tags/rel_1_2/
279	update	arniml	5957d 21h	/tags/rel_1_2/
278	initial check-in	arniml	5957d 23h	/tags/rel_1_2/
276	add change notes for release 1.0	arniml	6438d 21h	/tags/rel_1_2/
275	fix sensitivity list	arniml	6439d 20h	/tags/rel_1_2/
274	revision 1.0	arniml	6439d 20h	/tags/rel_1_2/
273	reset counter_q	arniml	6457d 06h	/tags/rel_1_2/
272	fix entity port names	arniml	6461d 08h	/tags/rel_1_2/
271	initial check-in	arniml	6461d 08h	/tags/rel_1_2/