URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_2/] [bench/] - Rev 304

Rev	Log message	Author	Age	Path
300	maintenance release for svn updates	arniml	5591d 10h	/t48/tags/rel_1_2/bench/
295	- remove unsupported CVS tags - propset for Id	arniml	5648d 13h	/t48/trunk/bench/
292	New directory structure.	root	5670d 23h	/t48/trunk/bench/
282	decouple bidir port T0 from P1 fixes testcase black_box/tx/t0	arniml	5986d 10h	/trunk/bench/
248	initial check-in	arniml	6641d 08h	/trunk/bench/
247	initial check-in	arniml	6641d 10h	/trunk/bench/
240	comment added about lower 1k of external ROM	arniml	6661d 08h	/trunk/bench/
234	cleanup & enhance external access	arniml	6663d 08h	/trunk/bench/
233	added external ROM	arniml	6663d 08h	/trunk/bench/
228	replaced syn_ram and syn_rom with generic_ram_ena and t48_rom/t49_rom/t3x_rom	arniml	6664d 08h	/trunk/bench/
224	initial check-in	arniml	6664d 08h	/trunk/bench/
220	new input xtal_en_i	arniml	6665d 08h	/trunk/bench/
202	fix address assignment	arniml	6895d 11h	/trunk/bench/
201	split low impedance markers for P2	arniml	6895d 11h	/trunk/bench/
200	add check for tCP: Port Control Setup to PROG'	arniml	6895d 11h	/trunk/bench/
183	fix missing assignment to outclock	arniml	6950d 15h	/trunk/bench/
160	add others to case statement	arniml	7228d 13h	/trunk/bench/
140	remove tAW sanity check conflicts with OUTL A, BUS	arniml	7267d 13h	/trunk/bench/
133	add checks for PSEN	arniml	7311d 08h	/trunk/bench/
111	split 4k internal ROM into + 2k internal ROM + 2k external ROM EA of t48_core is driven by MSB of internal ROM address if upper 2k block is selected, the system switches to EA mode on the fly	arniml	7424d 21h	/trunk/bench/