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[/] [t48/] [tags/] [rel_1_2/] [sw/] - Rev 102

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Rev Log message Author Age Path
102 update for changes in address space of external memory arniml 7384d 10h /t48/tags/rel_1_2/sw/
99 initial check-in arniml 7384d 10h /t48/tags/rel_1_2/sw/
97 initial check-in arniml 7384d 11h /t48/tags/rel_1_2/sw/
96 select dedicated directorie(s) for regression arniml 7385d 09h /t48/tags/rel_1_2/sw/
95 check counter inactivity arniml 7385d 09h /t48/tags/rel_1_2/sw/
94 initial check-in arniml 7385d 09h /t48/tags/rel_1_2/sw/
90 intial check-in arniml 7385d 09h /t48/tags/rel_1_2/sw/
89 initial check-in arniml 7399d 06h /t48/tags/rel_1_2/sw/
88 allow memory bank switching during interrupts arniml 7400d 08h /t48/tags/rel_1_2/sw/
87 abort gracfullt if memory bank switching does not work arniml 7400d 08h /t48/tags/rel_1_2/sw/
85 initial check-in arniml 7400d 13h /t48/tags/rel_1_2/sw/
74 enhance pass/fail detection arniml 7407d 13h /t48/tags/rel_1_2/sw/
70 clean test cell before make arniml 7413d 06h /t48/tags/rel_1_2/sw/
69 fix name of istrobe arniml 7413d 06h /t48/tags/rel_1_2/sw/
61 expand script for dump compare arniml 7415d 03h /t48/tags/rel_1_2/sw/
58 add periodic interrupt arniml 7416d 03h /t48/tags/rel_1_2/sw/
57 abort if no interrupt occurs arniml 7416d 03h /t48/tags/rel_1_2/sw/
52 + fix bug in PSW[3]
+ read SP properly for dump		 arniml 7417d 04h /t48/tags/rel_1_2/sw/
51 + implement Port1 and Port2
+ connect T0 and T1
+ return proper program memory contents		 arniml 7417d 04h /t48/tags/rel_1_2/sw/
49 Imported sources arniml 7422d 06h /t48/tags/rel_1_2/sw/

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