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[/] [t48/] [tags/] [rel_1_2/] [sw/] [verif/] - Rev 265

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Rev Log message Author Age Path
265 tagging changed for io expander simulation arniml 6593d 18h /t48/tags/rel_1_2/sw/verif/
264 initial check-in arniml 6593d 19h /t48/tags/rel_1_2/sw/verif/
246 initial check-in arniml 6598d 18h /t48/tags/rel_1_2/sw/verif/
245 initial check-in arniml 6598d 18h /t48/tags/rel_1_2/sw/verif/
239 adapt t48 external ROM offset arniml 6616d 17h /t48/tags/rel_1_2/sw/verif/
238 initial check-in arniml 6616d 17h /t48/tags/rel_1_2/sw/verif/
237 initial check-in arniml 6616d 17h /t48/tags/rel_1_2/sw/verif/
236 initial check-in arniml 6616d 18h /t48/tags/rel_1_2/sw/verif/
229 rework hex/simulation targets arniml 6619d 16h /t48/tags/rel_1_2/sw/verif/
199 initial check-in arniml 6850d 20h /t48/tags/rel_1_2/sw/verif/
194 initial check-in arniml 6852d 07h /t48/tags/rel_1_2/sw/verif/
185 initial check-in arniml 6905d 20h /t48/tags/rel_1_2/sw/verif/
184 initial check-in arniml 6905d 21h /t48/tags/rel_1_2/sw/verif/
173 testcase for bug report
"MSB of Program Counter changed upon PC increment"		 arniml 6996d 22h /t48/tags/rel_1_2/sw/verif/
141 disable external memory to avoid conflicts with outl a, bus arniml 7222d 22h /t48/tags/rel_1_2/sw/verif/
131 update arniml 7266d 17h /t48/tags/rel_1_2/sw/verif/
130 initial check-in arniml 7266d 17h /t48/tags/rel_1_2/sw/verif/
125 exclude from dump compare arniml 7336d 05h /t48/tags/rel_1_2/sw/verif/
122 test MB after return from interrupt arniml 7337d 03h /t48/tags/rel_1_2/sw/verif/
118 test MB/interrupt behaviour according to bug report
"Program Memory bank can be switched during interrupt"		 arniml 7339d 20h /t48/tags/rel_1_2/sw/verif/

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