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[/] [t48/] [tags/] [rel_1_3/] [sw/] [verif/] - Rev 118

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Rev Log message Author Age Path
118 test MB/interrupt behaviour according to bug report
"Program Memory bank can be switched during interrupt"
arniml 7316d 06h /t48/tags/rel_1_3/sw/verif/
113 generate two ROM files based on address:
+ 0 - 2047 : 2k internal ROM
+ 2048 - 4095 : 2k external ROM
arniml 7356d 15h /t48/tags/rel_1_3/sw/verif/
102 update for changes in address space of external memory arniml 7360d 12h /t48/tags/rel_1_3/sw/verif/
99 initial check-in arniml 7360d 12h /t48/tags/rel_1_3/sw/verif/
97 initial check-in arniml 7360d 13h /t48/tags/rel_1_3/sw/verif/
95 check counter inactivity arniml 7361d 10h /t48/tags/rel_1_3/sw/verif/
94 initial check-in arniml 7361d 10h /t48/tags/rel_1_3/sw/verif/
90 intial check-in arniml 7361d 11h /t48/tags/rel_1_3/sw/verif/
89 initial check-in arniml 7375d 08h /t48/tags/rel_1_3/sw/verif/
87 abort gracfullt if memory bank switching does not work arniml 7376d 09h /t48/tags/rel_1_3/sw/verif/
85 initial check-in arniml 7376d 15h /t48/tags/rel_1_3/sw/verif/
57 abort if no interrupt occurs arniml 7392d 05h /t48/tags/rel_1_3/sw/verif/
46 fix test arniml 7400d 05h /t48/tags/rel_1_3/sw/verif/
42 change test values that match better to the test case arniml 7401d 09h /t48/tags/rel_1_3/sw/verif/
39 initial check-in arniml 7403d 12h /t48/tags/rel_1_3/sw/verif/
36 make calculation of expected value more readable arniml 7403d 13h /t48/tags/rel_1_3/sw/verif/
34 fix test wrt AC arniml 7409d 07h /t48/tags/rel_1_3/sw/verif/
25 initial check-in arniml 7410d 06h /t48/tags/rel_1_3/sw/verif/
18 fix constant format arniml 7412d 04h /t48/tags/rel_1_3/sw/verif/
17 fix test arniml 7412d 04h /t48/tags/rel_1_3/sw/verif/

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