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[/] [t48/] [tags/] [rel_1_4/] [rtl/] - Rev 270

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Rev	Log message	Author	Age	Path
270	fix component name	arniml	6425d 18h	/t48/tags/rel_1_4/rtl/
262	name keyword added	arniml	6561d 05h	/t48/tags/rel_1_4/rtl/
261	* name tag added * restriction concerning expander port removed	arniml	6561d 05h	/t48/tags/rel_1_4/rtl/
249	Fix bug report "Deassertion of PROG too early" PROG is deasserted at end of XTAL3 now	arniml	6561d 05h	/t48/tags/rel_1_4/rtl/
247	initial check-in	arniml	6561d 07h	/t48/tags/rel_1_4/rtl/
231	obsoleted by new memory concept	arniml	6584d 05h	/t48/tags/rel_1_4/rtl/
227	replaced syn_ram and syn_rom with generic_ram_ena and t48_rom/t49_rom	arniml	6584d 05h	/t48/tags/rel_1_4/rtl/
226	replaced syn_ram with generic_ram_ena	arniml	6584d 05h	/t48/tags/rel_1_4/rtl/
225	replaced syn_rom and syn_ram with t48_rom and generic_ram_ena	arniml	6584d 05h	/t48/tags/rel_1_4/rtl/
224	initial check-in	arniml	6584d 05h	/t48/tags/rel_1_4/rtl/
222	add note about clock enable for data memory RAM macro	arniml	6585d 05h	/t48/tags/rel_1_4/rtl/
221	new input xtal_en_i	arniml	6585d 05h	/t48/tags/rel_1_4/rtl/
220	new input xtal_en_i	arniml	6585d 06h	/t48/tags/rel_1_4/rtl/
219	new input xtal_en_i gates xtal_i base clock	arniml	6585d 06h	/t48/tags/rel_1_4/rtl/
216	assign clk_i to outclock	arniml	6802d 09h	/t48/tags/rel_1_4/rtl/
215	suppress p2_output_pch_o when MOVX operation is accessing the external memory	arniml	6802d 09h	/t48/tags/rel_1_4/rtl/
214	fix sensitivity list	arniml	6809d 11h	/t48/tags/rel_1_4/rtl/
213	properly drive P1 and P2 with low impedance markers	arniml	6814d 07h	/t48/tags/rel_1_4/rtl/
211	wire signals for P2 low impedance marker issue	arniml	6815d 09h	/t48/tags/rel_1_4/rtl/
210	entity changes for P2 low impedance marker issue	arniml	6815d 09h	/t48/tags/rel_1_4/rtl/

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Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_4/] [rtl/] - Rev 270

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