URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_4/] [rtl/] [vhdl/] - Rev 344

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Rev	Log message	Author	Age	Path
344	release 1.4	arniml	515d 11h	/t48/tags/rel_1_4/rtl/vhdl/
342	merge branch wip_t2x into trunk	arniml	515d 11h	/t48/tags/rel_1_4/rtl/vhdl/
326	refine status_q update	arniml	544d 12h	/t48/tags/rel_1_4/rtl/vhdl/
325	experimental upi41_db_bus variant with asynchronous master interface	arniml	544d 19h	/t48/tags/rel_1_4/rtl/vhdl/
323	- prevent change when master reads status - relax master access timing	arniml	545d 18h	/t48/tags/rel_1_4/rtl/vhdl/
322	hold db_dir_o during entire access	arniml	547d 10h	/t48/tags/rel_1_4/rtl/vhdl/
321	improve compatibility with modelsim and ghdl	arniml	548d 07h	/t48/tags/rel_1_4/rtl/vhdl/
319	- add dma test - update dma logic	arniml	550d 10h	/t48/tags/rel_1_4/rtl/vhdl/
318	t8042ah synth, fix warnings	arniml	550d 14h	/t48/tags/rel_1_4/rtl/vhdl/
317	implement dma logic	arniml	550d 15h	/t48/tags/rel_1_4/rtl/vhdl/
315	fix upi master interrupt enables, rectify p2 tests	arniml	551d 16h	/t48/tags/rel_1_4/rtl/vhdl/
314	upi: remove include generics	arniml	551d 19h	/t48/tags/rel_1_4/rtl/vhdl/
313	- implement flags/master interrupt - add related test	arniml	552d 10h	/t48/tags/rel_1_4/rtl/vhdl/
312	add upi41a test for sts	arniml	553d 06h	/t48/tags/rel_1_4/rtl/vhdl/
311	add t8042ah	arniml	554d 07h	/t48/tags/rel_1_4/rtl/vhdl/
307	fix instance name	arniml	555d 07h	/t48/tags/rel_1_4/rtl/vhdl/
305	add t8041	arniml	556d 07h	/t48/tags/rel_1_4/rtl/vhdl/
304	decoder: fix in state upi41_db_bus: fix reset obf only for data read	arniml	556d 07h	/t48/tags/rel_1_4/rtl/vhdl/
303	add prelim upi41 support	arniml	557d 08h	/t48/tags/rel_1_4/rtl/vhdl/
302	fix compile with ghdl	arniml	1248d 15h	/t48/tags/rel_1_4/rtl/vhdl/

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Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_4/] [rtl/] [vhdl/] - Rev 344

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