URL https://opencores.org/ocsvn/t48/t48/trunk

Subversion Repositories t48

[/] [t48/] [tags/] [rel_1_4/] [sim/] - Rev 344

Rev	Log message	Author	Age	Path
344	release 1.4	arniml	511d 07h	/t48/tags/rel_1_4/sim/
342	merge branch wip_t2x into trunk	arniml	511d 08h	/t48/trunk/sim/
311	add t8042ah	arniml	550d 04h	/t48/trunk/sim/
306	add testbench for t8041 add test upi41/basic_echo	arniml	552d 04h	/t48/trunk/sim/
303	add prelim upi41 support	arniml	553d 05h	/t48/trunk/sim/
292	New directory structure.	root	5582d 16h	/t48/trunk/sim/
283	update to new mnemonic decoder	arniml	5897d 04h	/trunk/sim/
259	added t8243 core plus related testbenches	arniml	6553d 00h	/trunk/sim/
235	cleanup dependencies	arniml	6575d 01h	/trunk/sim/
232	update to new memory concept	arniml	6576d 00h	/trunk/sim/
223	obsoleted	arniml	6576d 00h	/trunk/sim/
218	simplifications	arniml	6663d 08h	/trunk/sim/
198	fix package dependencies	arniml	6807d 09h	/trunk/sim/
159	fix dependencies for tb_t8048_behav_c0 and tb_t8039_behav_c0	arniml	7140d 05h	/trunk/sim/
158	added hierarchies t8039_notri and t8048_notri	arniml	7140d 05h	/trunk/sim/
154	added t8039_notri hierarchy	arniml	7140d 06h	/trunk/sim/
151	added hierarchy t8048_notri and components package for t48 systems	arniml	7141d 18h	/trunk/sim/
116	adapt to GHDL 0.12 / gcc 3.4.0	arniml	7325d 05h	/trunk/sim/
112	update tb_behav_c0 for new ROM layout	arniml	7336d 14h	/trunk/sim/
93	add support for line coverage evaluation with gcov	arniml	7341d 10h	/trunk/sim/