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Subversion Repositories t6507lp

[/] [t6507lp/] - Rev 77

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Rev	Log message	Author	Age	Path
77	ZPG coded. Simulation is halfway.	creep	5601d 12h	/t6507lp/
76	ABS write instructions were not simulated. Also added some initial ZPG simulation.	creep	5601d 12h	/t6507lp/
75	First working version!	gabrieloshiro	5601d 13h	/t6507lp/
74	The file now describes who is doing what.	creep	5601d 13h	/t6507lp/
73	Added schedule file into the readme file.	creep	5601d 13h	/t6507lp/
72	Project management folder.	creep	5601d 13h	/t6507lp/
71	Four addressing modes are simulated: immediate, accumulator, implied and absolute. The simulation was done using a testbench that contains a small memory inside.	creep	5601d 13h	/t6507lp/
70	Fixed several timing. Registered outputs working. Only three adressing modes coded, the previous coding was erased.	creep	5605d 10h	/t6507lp/
69	Added signal origin/destination.	creep	5605d 11h	/t6507lp/
68	The FSM module is now parametrized. Also, several changes were made to remove most of the lint warnings.	creep	5605d 12h	/t6507lp/
67	File name change to lowercase. HAL says so!	creep	5605d 14h	/t6507lp/
66	File name change to lowercase. HAL says so!	creep	5605d 14h	/t6507lp/
65	Now the blocks are connected.	gabrieloshiro	5606d 09h	/t6507lp/
64	Constant were wrong.	gabrieloshiro	5606d 09h	/t6507lp/
63	Fixed several HAL warnings. Still plenty to do.	creep	5606d 09h	/t6507lp/
62	The DUT file name changed.	creep	5606d 09h	/t6507lp/
61	File name change to lowercase. HAL says so!	creep	5606d 10h	/t6507lp/
60	File name change. HAL says so!	creep	5606d 10h	/t6507lp/
59	I`ve fixed some latch creation.	gabrieloshiro	5606d 10h	/t6507lp/
58	ALU with all opcodes ready for simulation.	gabrieloshiro	5606d 10h	/t6507lp/

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Subversion Repositories t6507lp

[/] [t6507lp/] - Rev 77

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