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URL https://opencores.org/ocsvn/t6507lp/t6507lp/trunk

Subversion Repositories t6507lp

[/] [t6507lp/] [trunk/] - Rev 83

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Rev Log message Author Age Path
83 Completed HAL checking. All the relevant warnings and errors were removed. creep 5724d 23h /t6507lp/trunk/
82 Did some checking with HAL and fixed 20+ warnings and errors. creep 5725d 15h /t6507lp/trunk/
81 Decimal mode (BCD) is working. gabrieloshiro 5725d 16h /t6507lp/trunk/
80 Grouping some instructions that have the same behavioral. gabrieloshiro 5725d 16h /t6507lp/trunk/
79 ALU testbench added. gabrieloshiro 5725d 17h /t6507lp/trunk/
78 ZPG coded and simulated. creep 5725d 17h /t6507lp/trunk/
77 ZPG coded. Simulation is halfway. creep 5725d 18h /t6507lp/trunk/
76 ABS write instructions were not simulated.
Also added some initial ZPG simulation.		 creep 5725d 18h /t6507lp/trunk/
75 First working version! gabrieloshiro 5725d 18h /t6507lp/trunk/
74 The file now describes who is doing what. creep 5725d 18h /t6507lp/trunk/
72 Project management folder. creep 5725d 18h /t6507lp/trunk/
71 Four addressing modes are simulated: immediate, accumulator, implied and absolute.
The simulation was done using a testbench that contains a small memory inside.		 creep 5725d 19h /t6507lp/trunk/
70 Fixed several timing. Registered outputs working.
Only three adressing modes coded, the previous coding was erased.		 creep 5729d 15h /t6507lp/trunk/
69 Added signal origin/destination. creep 5729d 17h /t6507lp/trunk/
68 The FSM module is now parametrized.
Also, several changes were made to remove most of the lint warnings.		 creep 5729d 17h /t6507lp/trunk/
67 File name change to lowercase. HAL says so! creep 5729d 19h /t6507lp/trunk/
66 File name change to lowercase. HAL says so! creep 5729d 19h /t6507lp/trunk/
65 Now the blocks are connected. gabrieloshiro 5730d 14h /t6507lp/trunk/
64 Constant were wrong. gabrieloshiro 5730d 14h /t6507lp/trunk/
63 Fixed several HAL warnings. Still plenty to do. creep 5730d 14h /t6507lp/trunk/

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