URL https://opencores.org/ocsvn/t6507lp/t6507lp/trunk

Subversion Repositories t6507lp

[/] [t6507lp/] [trunk/] [rtl/] - Rev 139

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Rev	Log message	Author	Age	Path
139	t6507lp_package.v was renamed to avoid uppercase.	creep	5600d 08h	/t6507lp/trunk/rtl/
136	Some minor coding style changes.	gabrieloshiro	5601d 04h	/t6507lp/trunk/rtl/
129	RTL and e files are truly linked now. Some very early coverage is done.	creep	5605d 03h	/t6507lp/trunk/rtl/
128	$write and $finish primitives were removed from synthesizable blocks. Latches were removed. Top level were fixed (rw_mem and mem_rw should have the same name). All blocks were synthesized.	gabrieloshiro	5605d 07h	/t6507lp/trunk/rtl/
127	Testbench created. Simulation is almost done! Everything seems to be working fine.	gabrieloshiro	5605d 08h	/t6507lp/trunk/rtl/
126	Added a wrapper for the ALU. This file creates the clock for Specman.	creep	5605d 09h	/t6507lp/trunk/rtl/
120	Added some extra commentaries.	creep	5607d 04h	/t6507lp/trunk/rtl/
119	removing old file.	creep	5607d 07h	/t6507lp/trunk/rtl/
118	The top level name was in uppercase. The correct is lowercase.	creep	5607d 08h	/t6507lp/trunk/rtl/
117	Fixed the top level and connected the entire project.	creep	5607d 08h	/t6507lp/trunk/rtl/
116	Changed the module instantiation into the dot form.	creep	5607d 09h	/t6507lp/trunk/rtl/
115	Renamed the signal control. It is mem_rw now.	creep	5607d 09h	/t6507lp/trunk/rtl/
114	Created a global timescale file for the project. Added to the top module.	creep	5607d 09h	/t6507lp/trunk/rtl/
113	Timescale was unified.	gabrieloshiro	5607d 09h	/t6507lp/trunk/rtl/
112	Created a global timescale file for the project.	creep	5607d 09h	/t6507lp/trunk/rtl/
111	Performed some linting after coding was finished.	creep	5608d 01h	/t6507lp/trunk/rtl/
110	All addressing modes and special instructions have been coded and simulated. The file still requires coments, linting and some coverage.	creep	5608d 02h	/t6507lp/trunk/rtl/
109	PLA and PLP are coded and simulated.	creep	5608d 04h	/t6507lp/trunk/rtl/
108	PHA and PHP are coded and simulated.	creep	5608d 05h	/t6507lp/trunk/rtl/
107	The RTS instruction is working fine. Coded and simulated.	creep	5608d 06h	/t6507lp/trunk/rtl/

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Subversion Repositories t6507lp

[/] [t6507lp/] [trunk/] [rtl/] - Rev 139

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