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[/] [t6507lp/] [trunk/] [rtl/] [verilog/] - Rev 179

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Rev Log message Author Age Path
179 STA, STY and STX fixed gabrieloshiro 5703d 19h /t6507lp/trunk/rtl/verilog/
178 STA, STY and STX fixed gabrieloshiro 5703d 19h /t6507lp/trunk/rtl/verilog/
176 RTI works for me gabrieloshiro 5703d 22h /t6507lp/trunk/rtl/verilog/
175 PLP and RTI should be working according to stella now. STATUS <= alu_a. gabrieloshiro 5704d 18h /t6507lp/trunk/rtl/verilog/
174 SBC borrow flag bug fixed... again gabrieloshiro 5704d 18h /t6507lp/trunk/rtl/verilog/
173 SBC bug fixed. Borrow should be working properly. gabrieloshiro 5704d 18h /t6507lp/trunk/rtl/verilog/
172 RTI supported to be compatible with stella gabrieloshiro 5704d 20h /t6507lp/trunk/rtl/verilog/
171 Removed debug messages. creep 5704d 21h /t6507lp/trunk/rtl/verilog/
169 ADC bugs finally fixed. gabrieloshiro 5705d 14h /t6507lp/trunk/rtl/verilog/
168 RTI fixed! now ALU doesn`t support RTI instruction anymore. gabrieloshiro 5705d 15h /t6507lp/trunk/rtl/verilog/
167 Now SBC is supposed to work. gabrieloshiro 5705d 15h /t6507lp/trunk/rtl/verilog/
166 Commiting again! gabrieloshiro 5705d 16h /t6507lp/trunk/rtl/verilog/
165 SBC and PHP fixed! gabrieloshiro 5705d 16h /t6507lp/trunk/rtl/verilog/
164 ADC with decimal mode bug... is it ok now? gabrieloshiro 5705d 17h /t6507lp/trunk/rtl/verilog/
163 Still having bugs on ADC with decimal flag! Is it correct now? gabrieloshiro 5705d 18h /t6507lp/trunk/rtl/verilog/
162 ADC with decimal mode ON, bug fixed! gabrieloshiro 5705d 18h /t6507lp/trunk/rtl/verilog/
161 Sum and subtract were wrong when D flag was HIGH. gabrieloshiro 5705d 19h /t6507lp/trunk/rtl/verilog/
158 Bug 28 fixed. PHA was not coping the register to alu_a output gabrieloshiro 5708d 15h /t6507lp/trunk/rtl/verilog/
157 gabrieloshiro 5708d 15h /t6507lp/trunk/rtl/verilog/
156 Some bugs were fixed. Testbench were expecting wrong values sometimes. gabrieloshiro 5708d 17h /t6507lp/trunk/rtl/verilog/

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