OpenCores
URL https://opencores.org/ocsvn/thor/thor/trunk

Subversion Repositories thor

[/] [thor/] [trunk/] [FT64v5/] [rtl/] [common/] - Rev 59

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
59 - pretty state names for bus state machine
- stomped on load Fixed issue
- cache tracking errors
robfinch 2063d 10h /thor/trunk/FT64v5/rtl/common/
58 - fix branch predictor
- fix instruction expander
- 4k icache option
robfinch 2067d 07h /thor/trunk/FT64v5/rtl/common/
57 - three way code added
- fix data cache write hit update
robfinch 2067d 23h /thor/trunk/FT64v5/rtl/common/
56 - fix instruction length robfinch 2068d 09h /thor/trunk/FT64v5/rtl/common/
55 - compressed instructions
- task for enque
robfinch 2068d 22h /thor/trunk/FT64v5/rtl/common/
53 - cache wr_ack signal
- alu bypassing
- can exception branches
robfinch 2071d 04h /thor/trunk/FT64v5/rtl/common/
52 - updated to 10 queue entries robfinch 2072d 03h /thor/trunk/FT64v5/rtl/common/
51 - moved more decoding to decoder
- added fpu rtl code
robfinch 2073d 01h /thor/trunk/FT64v5/rtl/common/
50 - write buffering
- decoder
robfinch 2074d 02h /thor/trunk/FT64v5/rtl/common/
49 - added write buffer
- config header
robfinch 2074d 22h /thor/trunk/FT64v5/rtl/common/
48 - added version five of the core robfinch 2077d 23h /thor/trunk/FT64v5/rtl/common/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.