URL https://opencores.org/ocsvn/tinycpu/tinycpu/trunk

Subversion Repositories tinycpu

[/] [tinycpu/] [trunk/] - Rev 22

Filtering Options

From rev	To rev	Max revs

Search for

Rev	Log message	Author	Age	Path
22	Added to process sensitivity list to avoid warning and added ELSE for IR so it doesn't generate a latch	earlz	4405d 04h	/tinycpu/trunk/
21	The core_tb testbench finally passes. It probably doesn't synthesize, or even pass other testbenches, but it passes that one damn it.	earlz	4405d 04h	/tinycpu/trunk/
20	fuck it. All sorts of broken, will try to fix it tomorrow	earlz	4406d 04h	/tinycpu/trunk/
19	Got beginning of core/decoder for the CPU	earlz	4406d 05h	/tinycpu/trunk/
18	Finished memory controller	earlz	4409d 15h	/tinycpu/trunk/
17	Added fetch component for fetching from memory to instruction register Added additional testing for carryover to make sure it's correct	earlz	4410d 05h	/tinycpu/trunk/
16	Renamed incdec to carryover (see design for why). carryover should be done, though may change the "straight through on disable" behavior to instead leaving it floating depending on how things go later with coding.	earlz	4413d 07h	/tinycpu/trunk/
15	Added README, LICENSE, and the (so far not created) incdec component	earlz	4415d 04h	/tinycpu/trunk/
14	Added ALU with all the operations we'll need. Synthesizes as well trivially	earlz	4415d 12h	/tinycpu/trunk/
13	Forgot about the new library I added	earlz	4415d 15h	/tinycpu/trunk/
12	registerfile has ports for every register now makefile now uses GHW file format for gtkwave instead of VCD	earlz	4415d 16h	/tinycpu/trunk/
11	Finally, it synthesizes to BRAM.. Possibly need to fix how the DataOut syncs with WriteEnable and Address though if I plan to both read and write on the same clock edge	earlz	4419d 05h	/tinycpu/trunk/
10	Just committing so I can keep this original that passes simulation, but still synthesizes to LUTs	earlz	4419d 06h	/tinycpu/trunk/
9	Trying to add a byte-enable to the RAM. Used Xilinx's template for it, but ghdl won't pass the testbench	earlz	4419d 13h	/tinycpu/trunk/
8	Added blockram for inferring actual block RAM. Now we need a memory controller, not a crappy memory emulation thing	earlz	4420d 13h	/tinycpu/trunk/
7	Changed memory to fix bound check error Decreased size of RAM since 4096 bytes of RAM would require an FPGA with more than 32K flip-flops (mine has ~4000)	earlz	4420d 14h	/tinycpu/trunk/
6	Reworked memory code to hopefully synthesize better	earlz	4420d 18h	/tinycpu/trunk/
5	Modified registerfile to be dual-port for both read and write	earlz	4421d 06h	/tinycpu/trunk/
4	Added internal memory interface Updated design	earlz	4421d 14h	/tinycpu/trunk/
3	Updated registerfile to have 2 read ports Added super rough design document mainly just for brainstorming	earlz	4422d 06h	/tinycpu/trunk/

1 2 Next >

Show All

Browse

Tools

Subversion Repositories tinycpu

[/] [tinycpu/] [trunk/] - Rev 22

Filtering Options