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[/] [tinycpu/] [trunk/] [docs/] - Rev 29

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29 Well, added a testcase for testing the ALU bitwise operations and found a very large problem.
I'm pretty sure that the decoder needs to be partially unclocked because it essentially makes the ALU clocked how it is now, which is very bad.		 earlz 4523d 18h /tinycpu/trunk/docs/
27 Added a few ALU opcodes and came across a weird propogation delay issue with my registerfile.
As a workaround, I'm trying to use falling_edge instead of rising_edge. We shall see if I regret this later		 earlz 4524d 19h /tinycpu/trunk/docs/
25 Wait for memory state now works as expected, and opcode `mov [reg], immd` works now earlz 4525d 00h /tinycpu/trunk/docs/
21 The core_tb testbench finally passes. It probably doesn't synthesize, or even pass other testbenches, but it passes that one damn it. earlz 4526d 10h /tinycpu/trunk/docs/
19 Got beginning of core/decoder for the CPU earlz 4527d 11h /tinycpu/trunk/docs/
17 Added fetch component for fetching from memory to instruction register
Added additional testing for carryover to make sure it's correct		 earlz 4531d 11h /tinycpu/trunk/docs/
16 Renamed incdec to carryover (see design for why).
carryover should be done, though may change the "straight through on disable" behavior to instead leaving it floating depending on how things go later with coding.		 earlz 4534d 13h /tinycpu/trunk/docs/
14 Added ALU with all the operations we'll need. Synthesizes as well trivially earlz 4536d 19h /tinycpu/trunk/docs/
5 Modified registerfile to be dual-port for both read and write earlz 4542d 12h /tinycpu/trunk/docs/
4 Added internal memory interface
Updated design		 earlz 4542d 20h /tinycpu/trunk/docs/
3 Updated registerfile to have 2 read ports
Added super rough design document mainly just for brainstorming		 earlz 4543d 12h /tinycpu/trunk/docs/

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