| Rev |
Log message |
Author |
Age |
Path |
| 24 |
Good news, mov to IP actually works as expected! |
earlz |
4411d 17h |
/tinycpu/trunk/testbench/ |
| 23 |
Added top module for testing how our memory and cpu will work together. (hint: success)
Messing around with a small timing issue in core |
earlz |
4411d 18h |
/tinycpu/trunk/testbench/ |
| 21 |
The core_tb testbench finally passes. It probably doesn't synthesize, or even pass other testbenches, but it passes that one damn it. |
earlz |
4412d 10h |
/tinycpu/trunk/testbench/ |
| 20 |
fuck it. All sorts of broken, will try to fix it tomorrow |
earlz |
4413d 09h |
/tinycpu/trunk/testbench/ |
| 19 |
Got beginning of core/decoder for the CPU |
earlz |
4413d 11h |
/tinycpu/trunk/testbench/ |
| 18 |
Finished memory controller |
earlz |
4416d 21h |
/tinycpu/trunk/testbench/ |
| 17 |
Added fetch component for fetching from memory to instruction register
Added additional testing for carryover to make sure it's correct |
earlz |
4417d 10h |
/tinycpu/trunk/testbench/ |
| 16 |
Renamed incdec to carryover (see design for why).
carryover should be done, though may change the "straight through on disable" behavior to instead leaving it floating depending on how things go later with coding. |
earlz |
4420d 13h |
/tinycpu/trunk/testbench/ |
| 15 |
Added README, LICENSE, and the (so far not created) incdec component |
earlz |
4422d 10h |
/tinycpu/trunk/testbench/ |
| 14 |
Added ALU with all the operations we'll need. Synthesizes as well trivially |
earlz |
4422d 18h |
/tinycpu/trunk/testbench/ |
| 12 |
registerfile has ports for every register now
makefile now uses GHW file format for gtkwave instead of VCD |
earlz |
4422d 21h |
/tinycpu/trunk/testbench/ |
| 11 |
Finally, it synthesizes to BRAM.. Possibly need to fix how the DataOut syncs with WriteEnable and Address though if I plan to both read and write on the same clock edge |
earlz |
4426d 11h |
/tinycpu/trunk/testbench/ |
| 10 |
Just committing so I can keep this original that passes simulation, but still synthesizes to LUTs |
earlz |
4426d 11h |
/tinycpu/trunk/testbench/ |
| 9 |
Trying to add a byte-enable to the RAM. Used Xilinx's template for it, but ghdl won't pass the testbench |
earlz |
4426d 19h |
/tinycpu/trunk/testbench/ |
| 8 |
Added blockram for inferring actual block RAM.
Now we need a memory controller, not a crappy memory emulation thing |
earlz |
4427d 18h |
/tinycpu/trunk/testbench/ |
| 7 |
Changed memory to fix bound check error
Decreased size of RAM since 4096 bytes of RAM would require an FPGA with more than 32K flip-flops (mine has ~4000) |
earlz |
4427d 20h |
/tinycpu/trunk/testbench/ |
| 5 |
Modified registerfile to be dual-port for both read and write |
earlz |
4428d 11h |
/tinycpu/trunk/testbench/ |
| 4 |
Added internal memory interface
Updated design |
earlz |
4428d 19h |
/tinycpu/trunk/testbench/ |
| 3 |
Updated registerfile to have 2 read ports
Added super rough design document mainly just for brainstorming |
earlz |
4429d 11h |
/tinycpu/trunk/testbench/ |
| 2 |
Initial commit |
earlz |
4429d 12h |
/tinycpu/trunk/testbench/ |
