URL https://opencores.org/ocsvn/tv80/tv80/trunk

Subversion Repositories tv80

[/] [tv80/] - Rev 95

Rev	Log message	Author	Age	Path
95	Updated regression script to use SystemC simulation	ghutchis	5296d 15h	/tv80/
94	Ported over env_io.v from Verilog environment to tv_responder. Basic tests from Verilog environment (hello, fib) now passing in SystemC environment.	ghutchis	5298d 16h	/tv80/
93	Added common header file for all systemc environment	ghutchis	5299d 14h	/tv80/
92	Added responder to top level, beginning of support for ihex load	ghutchis	5303d 16h	/tv80/
91	Preliminary support for SystemC/Verilator environment	ghutchis	5303d 18h	/tv80/
90	Fixed syntax errors in core preventing Verilator from compiling. Added new capability to register generator to make registers which latch on an external event. Removed spurious copyright notice.	ghutchis	5303d 18h	/tv80/
89	RTL and environment fixes for nmi bug	ghutchis	5323d 21h	/tv80/
88	Fixed bug introduced by conversion of mcycle to one-hot FSM	ghutchis	5325d 12h	/tv80/
87	Added additional ifdef signals to remove unneede R (refresh) register	ghutchis	5340d 19h	/tv80/
86	Added old uploaded documents to new repository.	root	5564d 01h	/tv80/
85	Added old uploaded documents to new repository.	root	5564d 07h	/tv80/
84	New directory structure.	root	5564d 07h	/tv80/