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[/] [tv80/] [tags/] [rel_1_0/] - Rev 39

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Rev Log message Author Age Path
39 Added checksum port definitions, and test for block-OUT instructions ghutchis 7193d 09h /tv80/tags/rel_1_0/
38 Added command-line options for help (-h) and run with instruction decode (-d) ghutchis 7195d 02h /tv80/tags/rel_1_0/
37 Added new I/O registers for testing block I/O ghutchis 7195d 02h /tv80/tags/rel_1_0/
36 Removed default instruction decode ghutchis 7195d 02h /tv80/tags/rel_1_0/
35 Updated IO registers to add checksum and increment-on-read registers
used for testing block I/O instructions.		 ghutchis 7195d 13h /tv80/tags/rel_1_0/
34 Created test for block I/O instructions ghutchis 7195d 13h /tv80/tags/rel_1_0/
33 Added missing IncDec controls to OUTI/OUTD instructions ghutchis 7196d 10h /tv80/tags/rel_1_0/
32 Added "bintr" basic interrupt test, which tests Z80 interrupt mode 1. ghutchis 7211d 12h /tv80/tags/rel_1_0/
31 1) Added environment support for Z80 op decode in log file.
2) Fixed env support for interrupt generation and clearing		 ghutchis 7211d 12h /tv80/tags/rel_1_0/
30 Added HTML version of docs ghutchis 7214d 12h /tv80/tags/rel_1_0/
29 Added references ghutchis 7214d 12h /tv80/tags/rel_1_0/
28 Added code to initialize RAM to all 00 at environment start-up time. ghutchis 7214d 12h /tv80/tags/rel_1_0/
27 Modified tvs80 test to run from a ROM image, and work with the
standard environment.		 ghutchis 7214d 12h /tv80/tags/rel_1_0/
26 Updated docs ghutchis 7214d 13h /tv80/tags/rel_1_0/
25 Added XML master document ghutchis 7214d 15h /tv80/tags/rel_1_0/
24 tv80s.v ghutchis 7225d 02h /tv80/tags/rel_1_0/
23 Completed conversion to one-hot encoding ghutchis 7237d 16h /tv80/tags/rel_1_0/
22 Changed starting state for one-hot tstate ghutchis 7237d 16h /tv80/tags/rel_1_0/
21 Replaced encoded states with one-hot ghutchis 7238d 17h /tv80/tags/rel_1_0/
5 Added license info headers to all files. Added run2, which splits file
output into a ROM region and a RAM region.		 ghutchis 7292d 17h /tv80/tags/rel_1_0/

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