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[/] [tv80/] [trunk/] [rtl/] [core/] - Rev 115

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Rev Log message Author Age Path
111 Fixed inverted wait_n in tv80 core, updated sc_env environment ghutchis 4783d 06h /tv80/trunk/rtl/core/
100 Changed do to dout in tv80n, checked in fix for flags bug ghutchis 4899d 10h /tv80/trunk/rtl/core/
90 Fixed syntax errors in core preventing Verilator from compiling.
Added new capability to register generator to make registers which
latch on an external event. Removed spurious copyright notice.		 ghutchis 5315d 08h /tv80/trunk/rtl/core/
89 RTL and environment fixes for nmi bug ghutchis 5335d 11h /tv80/trunk/rtl/core/
88 Fixed bug introduced by conversion of mcycle to one-hot FSM ghutchis 5337d 01h /tv80/trunk/rtl/core/
87 Added additional ifdef signals to remove unneede R (refresh) register ghutchis 5352d 09h /tv80/trunk/rtl/core/
84 New directory structure. root 5575d 21h /tv80/trunk/rtl/core/
83 Some fixes from Guy-- replace case with casex. hharte 5649d 03h /tv80/trunk/rtl/core/
80 Misc. code clean-up on mcode to make code smaller and (hopefully)
more readable.		 ghutchis 6758d 11h /tv80/trunk/rtl/core/
74 Changed default for T2Write to be 1, to match expected behavior for
most users.		 ghutchis 6912d 14h /tv80/trunk/rtl/core/
60 Added ifdef TV80_REFRESH, to remove refresh logic by default. Also
ran untabify to remove tabs from source code.		 ghutchis 7079d 12h /tv80/trunk/rtl/core/
45 Added negedge version of top ghutchis 7136d 09h /tv80/trunk/rtl/core/
33 Added missing IncDec controls to OUTI/OUTD instructions ghutchis 7164d 07h /tv80/trunk/rtl/core/
24 tv80s.v ghutchis 7192d 23h /tv80/trunk/rtl/core/
23 Completed conversion to one-hot encoding ghutchis 7205d 13h /tv80/trunk/rtl/core/
22 Changed starting state for one-hot tstate ghutchis 7205d 13h /tv80/trunk/rtl/core/
21 Replaced encoded states with one-hot ghutchis 7206d 13h /tv80/trunk/rtl/core/
4 Removed obsolete top level ghutchis 7334d 10h /tv80/trunk/rtl/core/
2 Initial commit ghutchis 7334d 13h /tv80/trunk/rtl/core/

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