OpenCores
URL https://opencores.org/ocsvn/tv80/tv80/trunk

Subversion Repositories tv80

[/] [tv80/] [trunk/] [rtl/] [core/] - Rev 98

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
90 Fixed syntax errors in core preventing Verilator from compiling.
Added new capability to register generator to make registers which
latch on an external event. Removed spurious copyright notice.		 ghutchis 5315d 06h /tv80/trunk/rtl/core/
89 RTL and environment fixes for nmi bug ghutchis 5335d 08h /tv80/trunk/rtl/core/
88 Fixed bug introduced by conversion of mcycle to one-hot FSM ghutchis 5336d 23h /tv80/trunk/rtl/core/
87 Added additional ifdef signals to remove unneede R (refresh) register ghutchis 5352d 07h /tv80/trunk/rtl/core/
84 New directory structure. root 5575d 19h /tv80/trunk/rtl/core/
83 Some fixes from Guy-- replace case with casex. hharte 5649d 01h /tv80/trunk/rtl/core/
80 Misc. code clean-up on mcode to make code smaller and (hopefully)
more readable.		 ghutchis 6758d 09h /tv80/trunk/rtl/core/
74 Changed default for T2Write to be 1, to match expected behavior for
most users.		 ghutchis 6912d 12h /tv80/trunk/rtl/core/
60 Added ifdef TV80_REFRESH, to remove refresh logic by default. Also
ran untabify to remove tabs from source code.		 ghutchis 7079d 10h /tv80/trunk/rtl/core/
45 Added negedge version of top ghutchis 7136d 07h /tv80/trunk/rtl/core/
33 Added missing IncDec controls to OUTI/OUTD instructions ghutchis 7164d 04h /tv80/trunk/rtl/core/
24 tv80s.v ghutchis 7192d 21h /tv80/trunk/rtl/core/
23 Completed conversion to one-hot encoding ghutchis 7205d 11h /tv80/trunk/rtl/core/
22 Changed starting state for one-hot tstate ghutchis 7205d 11h /tv80/trunk/rtl/core/
21 Replaced encoded states with one-hot ghutchis 7206d 11h /tv80/trunk/rtl/core/
4 Removed obsolete top level ghutchis 7334d 08h /tv80/trunk/rtl/core/
2 Initial commit ghutchis 7334d 11h /tv80/trunk/rtl/core/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.