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[/] [uart16550/] [trunk/] [rtl/] - Rev 56

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Rev Log message Author Age Path
56 thre irq should be cleared only when being source of interrupt. mohor 8377d 04h /uart16550/trunk/rtl/
55 some synthesis bugs fixed gorban 8377d 16h /uart16550/trunk/rtl/
54 LSR status bit 0 was not cleared correctly in case of reseting the FCR (rx fifo). mohor 8378d 05h /uart16550/trunk/rtl/
53 Scratch register define added. mohor 8379d 05h /uart16550/trunk/rtl/
52 Scratch register added gorban 8379d 18h /uart16550/trunk/rtl/
51 Igor fixed break condition bugs gorban 8379d 18h /uart16550/trunk/rtl/
50 Bug in LSR[0] is fixed.
All WISHBONE signals are now sampled, so another wait-state is introduced on all transfers.
gorban 8383d 23h /uart16550/trunk/rtl/
49 committed the debug interface file gorban 8385d 17h /uart16550/trunk/rtl/
48 Updated specification documentation.
Added full 32-bit data bus interface, now as default.
Address is 5-bit wide in 32-bit data bus mode.
Added wb_sel_i input to the core. It's used in the 32-bit mode.
Added debug interface with two 32-bit read-only registers in 32-bit mode.
Bits 5 and 6 of LSR are now only cleared on TX FIFO write.
My small test bench is modified to work with 32-bit mode.
gorban 8386d 16h /uart16550/trunk/rtl/
47 Fixed: timeout and break didn't pay attention to current data format when counting time gorban 8391d 18h /uart16550/trunk/rtl/
46 Fixed bug that prevented synthesis in uart_receiver.v gorban 8392d 16h /uart16550/trunk/rtl/
45 Lots of fixes:
Break condition wasn't handled correctly at all.
LSR bits could lose their values.
LSR value after reset was wrong.
Timing of THRE interrupt signal corrected.
LSR bit 0 timing corrected.
gorban 8393d 16h /uart16550/trunk/rtl/
44 fixed more typo bugs gorban 8407d 16h /uart16550/trunk/rtl/
43 lsr1r error fixed. mohor 8407d 23h /uart16550/trunk/rtl/
42 ti_int_pnd error fixed. mohor 8407d 23h /uart16550/trunk/rtl/
41 ti_int_d error fixed. mohor 8407d 23h /uart16550/trunk/rtl/
40 Synthesis bugs fixed. Some other minor changes gorban 8410d 01h /uart16550/trunk/rtl/
39 Comments in Slovene language deleted, few small fixes for better work of
old tools. IRQs need to be fix.
mohor 8411d 23h /uart16550/trunk/rtl/
37 Heavily rewritten interrupt and LSR subsystems.
Many bugs hopefully squashed.
gorban 8412d 20h /uart16550/trunk/rtl/
36 no message mohor 8418d 04h /uart16550/trunk/rtl/

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