OpenCores
URL https://opencores.org/ocsvn/uart6551/uart6551/trunk

Subversion Repositories uart6551

[/] [uart6551/] [trunk/] - Rev 10

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
10 - zero output bus when not selected to allow wire-or'ing robfinch 560d 08h /uart6551/trunk/
9 - 100 MHz baud table
- transmitter timing
robfinch 564d 21h /uart6551/trunk/
8 - remove positional parameters robfinch 565d 15h /uart6551/trunk/
7 - added synchronous bus interface for top level robfinch 677d 00h /uart6551/trunk/
6 - updated to use vendor fifo's robfinch 866d 20h /uart6551/trunk/
5 - added 12-bit version robfinch 876d 23h /uart6551/trunk/
4 - fix count robfinch 1002d 23h /uart6551/trunk/
3 - improve operation with fifo's disabled robfinch 1786d 20h /uart6551/trunk/
2 robfinch 1793d 13h /uart6551/trunk/
1 The project and the structure was created root 1793d 16h /uart6551/trunk/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.