OpenCores
URL https://opencores.org/ocsvn/uart_block/uart_block/trunk

Subversion Repositories uart_block

[/] [uart_block/] - Rev 15

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
15 Taking out some warnings and transparent latches from the design leonardoaraujo.santos 4449d 12h /uart_block/
14 Fixing some warnings... Adding wishbone slave leonardoaraujo.santos 4450d 07h /uart_block/
13 Working on uart_control testbench... also applying some fixes... leonardoaraujo.santos 4450d 08h /uart_block/
12 Working on the communication blocks leonardoaraujo.santos 4450d 09h /uart_block/
11 Adding uart_communication_block leonardoaraujo.santos 4450d 12h /uart_block/
10 Working on the control unit part leonardoaraujo.santos 4450d 16h /uart_block/
9 Adding Control unit for uart block leonardoaraujo.santos 4451d 03h /uart_block/
8 Solving some bugs in baud_generator.vhd leonardoaraujo.santos 4451d 14h /uart_block/
7 Remember to clean project files leonardoaraujo.santos 4452d 10h /uart_block/
6 Adding baud generator leonardoaraujo.santos 4452d 11h /uart_block/
5 Adding sequential division (32 cycles per 32 bit word) leonardoaraujo.santos 4457d 12h /uart_block/
4 Working on receiver leonardoaraujo.santos 4459d 12h /uart_block/
3 Deleting unused files and changing tests leonardoaraujo.santos 4459d 13h /uart_block/
2 Starting here .... leonardoaraujo.santos 4459d 14h /uart_block/
1 The project and the structure was created root 4460d 05h /uart_block/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.