URL https://opencores.org/ocsvn/uart_block/uart_block/trunk

Subversion Repositories uart_block

[/] [uart_block/] [trunk/] [hdl/] - Rev 16

Rev	Log message	Author	Age	Path
16	Adding testbench for wishbone slave module	leonardoaraujo.santos	4508d 16h	/uart_block/trunk/hdl/
15	Taking out some warnings and transparent latches from the design	leonardoaraujo.santos	4508d 18h	/uart_block/trunk/hdl/
14	Fixing some warnings... Adding wishbone slave	leonardoaraujo.santos	4509d 13h	/uart_block/trunk/hdl/
13	Working on uart_control testbench... also applying some fixes...	leonardoaraujo.santos	4509d 14h	/uart_block/trunk/hdl/
12	Working on the communication blocks	leonardoaraujo.santos	4509d 15h	/uart_block/trunk/hdl/
11	Adding uart_communication_block	leonardoaraujo.santos	4509d 18h	/uart_block/trunk/hdl/
10	Working on the control unit part	leonardoaraujo.santos	4509d 22h	/uart_block/trunk/hdl/
9	Adding Control unit for uart block	leonardoaraujo.santos	4510d 09h	/uart_block/trunk/hdl/
8	Solving some bugs in baud_generator.vhd	leonardoaraujo.santos	4510d 20h	/uart_block/trunk/hdl/
7	Remember to clean project files	leonardoaraujo.santos	4511d 16h	/uart_block/trunk/hdl/
6	Adding baud generator	leonardoaraujo.santos	4511d 16h	/uart_block/trunk/hdl/
5	Adding sequential division (32 cycles per 32 bit word)	leonardoaraujo.santos	4516d 18h	/uart_block/trunk/hdl/
4	Working on receiver	leonardoaraujo.santos	4518d 18h	/uart_block/trunk/hdl/
3	Deleting unused files and changing tests	leonardoaraujo.santos	4518d 19h	/uart_block/trunk/hdl/
2	Starting here ....	leonardoaraujo.santos	4518d 20h	/uart_block/trunk/hdl/