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[/] [uart_block/] [trunk/] [hdl/] [iseProject/] [xst/] - Rev 33

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Rev Log message Author Age Path
32 Change baud generator to create a overclock frequency of 8x the baud rate....
Change the serial receiver to sample the signal on the middle of the serial input, now it's using only the overclocked baud...		 leonardoaraujo.santos 4446d 08h /uart_block/trunk/hdl/iseProject/xst/
31 Working on documentation and on Chipscope leonardoaraujo.santos 4446d 20h /uart_block/trunk/hdl/iseProject/xst/
30 Preparing to work with chipscope leonardoaraujo.santos 4446d 20h /uart_block/trunk/hdl/iseProject/xst/
29 Preparing to work with chipscope leonardoaraujo.santos 4446d 21h /uart_block/trunk/hdl/iseProject/xst/
28 Changing wrong datasheet of Spartan3A kit for newer one.... Detected some bug on the reception (When is fast it seems that the reception could be wrong...) leonardoaraujo.santos 4446d 21h /uart_block/trunk/hdl/iseProject/xst/
27 First version seems working nice on the PC!!! leonardoaraujo.santos 4446d 22h /uart_block/trunk/hdl/iseProject/xst/
24 Working on testbench and refactoring... now we could start some tests on the board... leonardoaraujo.santos 4448d 03h /uart_block/trunk/hdl/iseProject/xst/
22 Refactoring the uart_control leonardoaraujo.santos 4448d 07h /uart_block/trunk/hdl/iseProject/xst/
21 Preparing to rewrite uart_control, adding pin to indicate data available at the RX leonardoaraujo.santos 4448d 13h /uart_block/trunk/hdl/iseProject/xst/
20 Finishing at least the tests on testbench.... Was good to verify that the uart_control should be redesigned to allow concurrent receive and to clean the code... leonardoaraujo.santos 4448d 21h /uart_block/trunk/hdl/iseProject/xst/
19 Working on the top wishbone slave testbench.... still need some fixes (Both on the testbench and on the uart_control.vhd) leonardoaraujo.santos 4448d 22h /uart_block/trunk/hdl/iseProject/xst/
16 Adding testbench for wishbone slave module leonardoaraujo.santos 4449d 06h /uart_block/trunk/hdl/iseProject/xst/
15 Taking out some warnings and transparent latches from the design leonardoaraujo.santos 4449d 07h /uart_block/trunk/hdl/iseProject/xst/
14 Fixing some warnings... Adding wishbone slave leonardoaraujo.santos 4450d 03h /uart_block/trunk/hdl/iseProject/xst/
13 Working on uart_control testbench... also applying some fixes... leonardoaraujo.santos 4450d 04h /uart_block/trunk/hdl/iseProject/xst/
11 Adding uart_communication_block leonardoaraujo.santos 4450d 08h /uart_block/trunk/hdl/iseProject/xst/
6 Adding baud generator leonardoaraujo.santos 4452d 06h /uart_block/trunk/hdl/iseProject/xst/
4 Working on receiver leonardoaraujo.santos 4459d 08h /uart_block/trunk/hdl/iseProject/xst/
2 Starting here .... leonardoaraujo.santos 4459d 10h /uart_block/trunk/hdl/iseProject/xst/

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