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URL https://opencores.org/ocsvn/uart_fpga_slow_control_migrated/uart_fpga_slow_control_migrated/trunk

Subversion Repositories uart_fpga_slow_control_migrated

[/] [uart_fpga_slow_control/] [trunk/] [documents/] - Rev 34

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34 ADDED: Philips_PC16550dn_datasheet.pdf aborga 4436d 09h /uart_fpga_slow_control/trunk/documents/
33 UPDATE: visio simplified diagram aborga 4576d 02h /uart_fpga_slow_control/trunk/documents/
32 ADDED: OpenCores_description_html.txt aborga 4577d 01h /uart_fpga_slow_control/trunk/documents/
31 ADDED: html version of the different site section back-upped in txt format aborga 4577d 03h /uart_fpga_slow_control/trunk/documents/
30 MODIFIED: cosmetic changes on the SoftwareFolder.txt file aborga 4577d 04h /uart_fpga_slow_control/trunk/documents/
29 UPDATED: project documentation for the new software features aborga 4577d 04h /uart_fpga_slow_control/trunk/documents/
27 MODIFIED: small description improvement aborga 4584d 05h /uart_fpga_slow_control/trunk/documents/
26 ADDED: screenshot of the simulation output with tb_uart_control.vhd (project tested with modelsim 6) aborga 4658d 02h /uart_fpga_slow_control/trunk/documents/
20 MODIFIED: block diagram with new namings for uart din and dout aborga 4658d 07h /uart_fpga_slow_control/trunk/documents/
14 ADDED: backup of the project description aborga 4661d 20h /uart_fpga_slow_control/trunk/documents/
13 UDATED: simple documentation aborga 4661d 22h /uart_fpga_slow_control/trunk/documents/
12 ADDED: original documentation of the UART_16550 core by LeFevre aborga 4661d 22h /uart_fpga_slow_control/trunk/documents/
11 ADDED: Block diagram of the UART_FPGA_slow_control_main_diagram
1) pdf format
2) Microsoft visio source file (sorry...)		 aborga 4661d 22h /uart_fpga_slow_control/trunk/documents/
10 MODIFIED: added further description and examples aborga 4662d 05h /uart_fpga_slow_control/trunk/documents/
9 ADDED: HowToSVN.txt to handle repositories with windows Tortoise SVN aborga 4662d 05h /uart_fpga_slow_control/trunk/documents/
8 ADDED: some more documentation

1) screenshot of a full read and write sequence with questasim
2) example hex commands to be sent via RealTerm		 aborga 4662d 06h /uart_fpga_slow_control/trunk/documents/
6 CREATED: how to change baudrate text file aborga 4662d 06h /uart_fpga_slow_control/trunk/documents/

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