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[/] [usb_dongle_fpga/] [tags/] [version_1_5/] - Rev 19

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Rev Log message Author Age Path
19 Fix'ed cycle type init code copy/pase mistake nuubik 5972d 12h /usb_dongle_fpga/tags/version_1_5/
18 Fixed in reset init of some trigers (this should not have generated extra hardware in FPGA but just to be on the safe side) nuubik 5973d 11h /usb_dongle_fpga/tags/version_1_5/
17 changed version code to 04 and added spy mode by puting jumpers on header and also implemented LPC Firmware Hub read to enable this booting mode (selectable by header jumper see documentation) nuubik 5973d 12h /usb_dongle_fpga/tags/version_1_5/
16 Synchronisation with OpenCores release nuubik 6106d 09h /usb_dongle_fpga/tags/version_1_5/
15 changed version code to 03 and disabled spy mode on juper setting 00 (this disabled booting but postcode IO write was displayed) nuubik 6223d 11h /usb_dongle_fpga/tags/version_1_5/
14 added comment on POR time influence when booting from LPC dongle nuubik 6235d 10h /usb_dongle_fpga/tags/version_1_5/
12 Added windows py bindings check with nice info print with link to installer nuubik 6337d 04h /usb_dongle_fpga/tags/version_1_5/
11 one ; in line end possible runtime error nuubik 6337d 04h /usb_dongle_fpga/tags/version_1_5/
10 fixed a typo nuubik 6341d 02h /usb_dongle_fpga/tags/version_1_5/
9 Made failing on port open retry nuubik 6341d 02h /usb_dongle_fpga/tags/version_1_5/
8 Added PCB level test options nuubik 6341d 09h /usb_dongle_fpga/tags/version_1_5/
7 Fixed pin modes and resyntesized nuubik 6341d 09h /usb_dongle_fpga/tags/version_1_5/
6 Fixed Cyclon part no in datasheets and drawings nuubik 6378d 07h /usb_dongle_fpga/tags/version_1_5/
4 Changed LED SM front to falling to avoid large current switches at the same time as data nuubik 6404d 02h /usb_dongle_fpga/tags/version_1_5/
3 Changed outputs to LVCMOS and lowered drive current to 2mA to avoid noise on longer tracs and fast switching speeds nuubik 6404d 03h /usb_dongle_fpga/tags/version_1_5/
2 Initial global code commit nuubik 6418d 10h /usb_dongle_fpga/tags/version_1_5/
1 Standard project directories initialized by cvs2svn. 6418d 10h /usb_dongle_fpga/tags/version_1_5/

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