OpenCores
URL https://opencores.org/ocsvn/v586/v586/trunk

Subversion Repositories v586

[/] [v586/] - Rev 18

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Rev Log message Author Age Path
18 added original uart16750 files ultro 3527d 00h /v586/
17 change makefile for verilog simulation with 16750 ultro 3527d 00h /v586/
16 added gpio and second uart to ucf ultro 3527d 00h /v586/
15 update mem files for booting at 57600 bauds with 16750 ultro 3527d 00h /v586/
14 update RTL with bug fix for prefetch and dual aurt 16750 addition ultro 3527d 00h /v586/
13 added 16750 uart netlist ultro 3527d 00h /v586/
12 delete 16450 ultro 3527d 00h /v586/
11 commit nex mcs ultro 3555d 23h /v586/
10 delete ultro 3555d 23h /v586/
9 update readme ultro 3555d 23h /v586/
8 update boot for faster copy from spi flash to sram ultro 3556d 00h /v586/
7 update bug on prefetch length grant 10 -> 11 ultro 3556d 00h /v586/
6 removed extra file ultro 3559d 11h /v586/
5 initial commit ultro 3559d 18h /v586/
4 initial commit ultro 3559d 18h /v586/
3 initial commit ultro 3559d 18h /v586/
2 initial commit ultro 3559d 18h /v586/
1 The project and the structure was created root 3560d 02h /v586/

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