URL https://opencores.org/ocsvn/versatile_fifo/versatile_fifo/trunk

Subversion Repositories versatile_fifo

[/] [versatile_fifo/] - Rev 31

Rev	Log message	Author	Age	Path
31	port map	unneback	5028d 15h	/versatile_fifo/
30	port map	unneback	5028d 15h	/versatile_fifo/
29	ACTEL syn define	unneback	5036d 13h	/versatile_fifo/
28	ACTEL async dual way FIFO	unneback	5043d 22h	/versatile_fifo/
27	initial commit, dual way simplex FIFO	unneback	5044d 14h	/versatile_fifo/
26	added ACTEL synthesis directive as define, +ACTEL	unneback	5044d 14h	/versatile_fifo/
25	DFF SR as separate logic	unneback	5184d 09h	/versatile_fifo/
24	updated fifo interfaces with re/rd and we/wr	unneback	5185d 00h	/versatile_fifo/
23		unneback	5187d 12h	/versatile_fifo/
22	async fifo with multiple queues	unneback	5187d 13h	/versatile_fifo/
21	added DFF SR	unneback	5201d 10h	/versatile_fifo/
20		unneback	5201d 17h	/versatile_fifo/
19	DFF with async clear and set for Altera cycloneIV	unneback	5203d 00h	/versatile_fifo/
18	ADDR and DATA width set to 8 resp 32	unneback	5203d 13h	/versatile_fifo/
17	based on updated versatile counter	unneback	5207d 12h	/versatile_fifo/
16	changed power of two style	unneback	5470d 22h	/versatile_fifo/
15	doc updated gray_counter_defines added dual port RAM updated	unneback	5474d 15h	/versatile_fifo/
14	added PDF	unneback	5518d 22h	/versatile_fifo/
13	adr update	unneback	5520d 00h	/versatile_fifo/
12	no mux on dual port mem read	unneback	5532d 17h	/versatile_fifo/