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[/] [versatile_fifo/] [trunk/] - Rev 32

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Rev Log message Author Age Path
32 fixed SYN directives marcus.erlandsson 5010d 18h /versatile_fifo/trunk/
31 port map unneback 5081d 11h /versatile_fifo/trunk/
30 port map unneback 5081d 12h /versatile_fifo/trunk/
29 ACTEL syn define unneback 5089d 09h /versatile_fifo/trunk/
28 ACTEL async dual way FIFO unneback 5096d 19h /versatile_fifo/trunk/
27 initial commit, dual way simplex FIFO unneback 5097d 10h /versatile_fifo/trunk/
26 added ACTEL synthesis directive as define, +ACTEL unneback 5097d 10h /versatile_fifo/trunk/
25 DFF SR as separate logic unneback 5237d 06h /versatile_fifo/trunk/
24 updated fifo interfaces with re/rd and we/wr unneback 5237d 20h /versatile_fifo/trunk/
23 unneback 5240d 09h /versatile_fifo/trunk/
22 async fifo with multiple queues unneback 5240d 09h /versatile_fifo/trunk/
21 added DFF SR unneback 5254d 07h /versatile_fifo/trunk/
20 unneback 5254d 14h /versatile_fifo/trunk/
19 DFF with async clear and set for Altera cycloneIV unneback 5255d 20h /versatile_fifo/trunk/
18 ADDR and DATA width set to 8 resp 32 unneback 5256d 10h /versatile_fifo/trunk/
17 based on updated versatile counter unneback 5260d 08h /versatile_fifo/trunk/
16 changed power of two style unneback 5523d 18h /versatile_fifo/trunk/
15 doc updated
gray_counter_defines added
dual port RAM updated
unneback 5527d 12h /versatile_fifo/trunk/
14 added PDF unneback 5571d 18h /versatile_fifo/trunk/
13 adr update unneback 5572d 20h /versatile_fifo/trunk/

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