URL https://opencores.org/ocsvn/versatile_mem_ctrl/versatile_mem_ctrl/trunk

Subversion Repositories versatile_mem_ctrl

[/] [versatile_mem_ctrl/] [trunk/] - Rev 12

Rev	Log message	Author	Age	Path
12	Minor update of whishbone FSMs in TB	mikaeljf	5341d 21h	/versatile_mem_ctrl/trunk/
11	Initial version with support for DDR	mikaeljf	5342d 09h	/versatile_mem_ctrl/trunk/
10		unneback	5369d 17h	/versatile_mem_ctrl/trunk/
9	testbench	unneback	5369d 17h	/versatile_mem_ctrl/trunk/
8		unneback	5465d 13h	/versatile_mem_ctrl/trunk/
7		unneback	5465d 13h	/versatile_mem_ctrl/trunk/
6		unneback	5465d 13h	/versatile_mem_ctrl/trunk/
5	pass initial testing	unneback	5465d 14h	/versatile_mem_ctrl/trunk/
4		unneback	5466d 17h	/versatile_mem_ctrl/trunk/
3		unneback	5466d 19h	/versatile_mem_ctrl/trunk/
2	initial	unneback	5472d 17h	/versatile_mem_ctrl/trunk/
1	The project was created and the structure was created	root	5472d 17h	/versatile_mem_ctrl/trunk/