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URL https://opencores.org/ocsvn/versatile_mem_ctrl/versatile_mem_ctrl/trunk

Subversion Repositories versatile_mem_ctrl

[/] [versatile_mem_ctrl/] [trunk/] - Rev 93

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Rev Log message Author Age Path
86 mikaeljf 5264d 00h /versatile_mem_ctrl/trunk/
85 Added a versatile_mem_ctrl specific version of the flag generation module in the versatile fifo. mikaeljf 5265d 00h /versatile_mem_ctrl/trunk/
84 mikaeljf 5268d 23h /versatile_mem_ctrl/trunk/
83 mikaeljf 5269d 18h /versatile_mem_ctrl/trunk/
82 mikaeljf 5269d 22h /versatile_mem_ctrl/trunk/
81 mikaeljf 5270d 19h /versatile_mem_ctrl/trunk/
80 mikaeljf 5270d 20h /versatile_mem_ctrl/trunk/
79 Added defines that fix bugs with slow wishbone clocks doing burst writes julius 5308d 10h /versatile_mem_ctrl/trunk/
78 Burst writing working again, although its mostly hardcoded to burst 4. Also added a fix for when the RAM and bus clocks are about the same speed, to avoid buffer overrun julius 5310d 16h /versatile_mem_ctrl/trunk/
77 SDR 16 registering of current_fifo_empty signal in top, appropriate control alterations in fsm_sdr_16 julius 5318d 15h /versatile_mem_ctrl/trunk/
76 Changed SDR16 synthesis useioff location, fsm_wb acking logic, default SDR build is for 16m part now julius 5323d 16h /versatile_mem_ctrl/trunk/
75 mikaeljf 5323d 17h /versatile_mem_ctrl/trunk/
74 Minor update of rtl Makefile. mikaeljf 5327d 16h /versatile_mem_ctrl/trunk/
73 Minor updates to fix lost revisions 69 and 70. mikaeljf 5327d 17h /versatile_mem_ctrl/trunk/
72 Restored lost revisions 69 and 70. mikaeljf 5327d 18h /versatile_mem_ctrl/trunk/
71 Replacing versatile_mem_ctrl_top with revisino 68 version but with top level ack fix. May lose some of revision 69 and 70 changes julius 5327d 19h /versatile_mem_ctrl/trunk/
70 mikaeljf 5331d 01h /versatile_mem_ctrl/trunk/
69 mikaeljf 5331d 21h /versatile_mem_ctrl/trunk/
68 cleaqnup unneback 5333d 10h /versatile_mem_ctrl/trunk/
67 added FSM for wb if unneback 5333d 10h /versatile_mem_ctrl/trunk/

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