URL https://opencores.org/ocsvn/versatile_mem_ctrl/versatile_mem_ctrl/trunk

Subversion Repositories versatile_mem_ctrl

[/] [versatile_mem_ctrl/] [trunk/] [rtl/] - Rev 36

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Rev	Log message	Author	Age	Path
36		unneback	5189d 02h	/versatile_mem_ctrl/trunk/rtl/
35	work for limited test case	unneback	5189d 09h	/versatile_mem_ctrl/trunk/rtl/
34	added	unneback	5189d 09h	/versatile_mem_ctrl/trunk/rtl/
33	work for limited test case, no cke inhibit for fifo empty	unneback	5189d 12h	/versatile_mem_ctrl/trunk/rtl/
32	Updated the testbench to match the new wishbone interface.	mikaeljf	5192d 16h	/versatile_mem_ctrl/trunk/rtl/
31	Added Xilinx primitive for dff_sr.v module, updated rtl-Makefile adn simulation scripts.	mikaeljf	5194d 09h	/versatile_mem_ctrl/trunk/rtl/
30	Added Xilinx primitive for dff_sr.v module, updated rtl-Makefile adn simulation scripts.	mikaeljf	5194d 09h	/versatile_mem_ctrl/trunk/rtl/
28	Fixed typos and updated the rtl Makefile and Altera-Modelsim script. Modified the counter-excel file and added missing module 'dff_sr.v'.	mikaeljf	5198d 11h	/versatile_mem_ctrl/trunk/rtl/
27		unneback	5202d 02h	/versatile_mem_ctrl/trunk/rtl/
26	compiles OK, not simulated	unneback	5204d 01h	/versatile_mem_ctrl/trunk/rtl/
25		unneback	5204d 04h	/versatile_mem_ctrl/trunk/rtl/
24	Updated the memory controller according to recent update of Versatile_counter. Modified the rtl Makefile and added an excel file with counter definitions.	mikaeljf	5204d 15h	/versatile_mem_ctrl/trunk/rtl/
23	Removed redundant code.	mikaeljf	5212d 08h	/versatile_mem_ctrl/trunk/rtl/
22	Updated the Altera timing constraints file, also minor updates of defines file and Makefile.	mikaeljf	5214d 04h	/versatile_mem_ctrl/trunk/rtl/
21	Updated the Altera timing constraints file (.sdc).	mikaeljf	5218d 07h	/versatile_mem_ctrl/trunk/rtl/
20	Minor update of sdc-file.	mikaeljf	5220d 08h	/versatile_mem_ctrl/trunk/rtl/
19	Added do-file for Modelsim waveform viewer.	mikaeljf	5226d 13h	/versatile_mem_ctrl/trunk/rtl/
18	Updated the rtl/verilog Makefile and the bench Makefile.	mikaeljf	5227d 10h	/versatile_mem_ctrl/trunk/rtl/
17	Modified rtl Makefile and tb_defines.v	mikaeljf	5230d 09h	/versatile_mem_ctrl/trunk/rtl/
16	Added fizzim.pl	mikaeljf	5230d 09h	/versatile_mem_ctrl/trunk/rtl/

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Subversion Repositories versatile_mem_ctrl

[/] [versatile_mem_ctrl/] [trunk/] [rtl/] - Rev 36

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