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[/] [vga_lcd/] [tags/] [rel_1/] - Rev 36

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Rev Log message Author Age Path
36 Fixed two small bugs that only showed up when the hardware cursors were disabled rherveille 8129d 16h /vga_lcd/tags/rel_1/
35 no message rherveille 8129d 19h /vga_lcd/tags/rel_1/
34 Added hardware cursor support to wishbone master.
Added provision to turn-off 3D cursors.
Fixed some minor bugs.
rherveille 8153d 05h /vga_lcd/tags/rel_1/
33 Added 64x64pixels 4bpp hardware cursor support. rherveille 8153d 10h /vga_lcd/tags/rel_1/
32 Fixed dat_o incomplete sensitivity list. rherveille 8160d 15h /vga_lcd/tags/rel_1/
31 Some minor bug-fixes.
Changed vga_ssel into vga_curproc (cursor processor).
rherveille 8169d 10h /vga_lcd/tags/rel_1/
30 Fixed some bugs discovered by modified testbench
Removed / Changed some strange logic constructions
Started work on hardware cursor support (not finished yet)
Changed top-level name to vga_enh_top.v
rherveille 8178d 15h /vga_lcd/tags/rel_1/
29 Added wb_ack delay section to testbench rherveille 8178d 15h /vga_lcd/tags/rel_1/
28 Changed counter-library.
Changed vga-core.
Added 32bpp mode.
rherveille 8188d 17h /vga_lcd/tags/rel_1/
27 Added 32bpp
Fixed some typos
Added bandwidth section
rherveille 8188d 17h /vga_lcd/tags/rel_1/
26 Added 32bpp tests rherveille 8188d 17h /vga_lcd/tags/rel_1/
25 C-include file.
Initial release
rherveille 8255d 11h /vga_lcd/tags/rel_1/
24 Updated testbench for VGA/LCD Core version 2.0 rherveille 8262d 14h /vga_lcd/tags/rel_1/
23 Added Copyright/Licence header rherveille 8263d 09h /vga_lcd/tags/rel_1/
22 VGA Core v2.0
Document revision 0.7
rherveille 8283d 06h /vga_lcd/tags/rel_1/
21 VGA Core v2.0
Document revision 0.7
rherveille 8283d 06h /vga_lcd/tags/rel_1/
20 Switched parameter order. rherveille 8292d 11h /vga_lcd/tags/rel_1/
19 Major revisions throughout the core.
Moved Color Lookup Table inside core.
Changed control & status register contents.
Changed port names to be conform to new naming convention.
Fixed bug in CAB assertion.
Changed video memory address generation.
and many more ....
rherveille 8292d 12h /vga_lcd/tags/rel_1/
18 Removed files. They are not used anymore. rherveille 8321d 09h /vga_lcd/tags/rel_1/
17 Major rework.
Included generic memory models.
Core now supports pixel clocks at same speed as wishbone clock (except for 8bpp color mode)
rherveille 8321d 09h /vga_lcd/tags/rel_1/

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