Rev |
Log message |
Author |
Age |
Path |
20 |
- interim release w11a_V0.57 (untagged)
- new C++ and Tcl based backend server supports now RK11 handling
- w11a systems operate with rlink over USB on nexsy2 and nexsy3 boards.
See w11a_os_guide.txt for details |
wfjm |
4147d 17h |
/w11/tags/w11a_V0.6/rtl/sys_gen/ |
19 |
- interim release w11a_V0.562 (untagged)
- C++ and Tcl based backend server: many support classes for interfacing to
w11 system designs, and the associated Tcl bindings.
- add 'asm-11', a simple, Macro-11 syntax subset combatible, assembler.
- use now doxygen 1.8.3.1, generate c++,tcl, and vhdl source docs |
wfjm |
4161d 14h |
/w11/tags/w11a_V0.6/rtl/sys_gen/ |
18 |
- interim release w11a_V0.561 (untagged)
- Added simple simulation model of Cypress FX2 and test benches for
functional verifcation of FX2 controller
- Bugfixes in FX2 firmware and controller, works now also on Nexys3 & Atlys
- Added test systems for rlink over USB verification for Nexys3 & Atlys |
wfjm |
4258d 15h |
/w11/tags/w11a_V0.6/rtl/sys_gen/ |
17 |
- interim release w11a_V0.56 (untagged)
- re-organized handling of board and derived clocks in test benches
- added message filter definitions for some designs (.mfset files)
- added Cypress EZ-USB FX2 controller (USB interface)
- added firmware for EZ-USB FX2 supporting jtag access and data transfer
- FPGA configure over USB now supported directly in make build flow
- added test systems for USB testing and rlink over USB verification
- no functional change of w11a CPU core or any pre-existing test systems
- Note: Carefully read the disclaimer about usage of USB VID/PID numbers
in the file README_USB-VID-PID.txt. You'll be responsible for any
misuse of the defaults provided with the project sources !! |
wfjm |
4262d 10h |
/w11/tags/w11a_V0.6/rtl/sys_gen/ |
16 |
- interim release w11a_V0.55 (untagged)
- added xon/xoff (software flow control) support to serport library
- added test systems for serport verification
- use new serport stack in sys_w11a_* and sys_tst_rlink_* systems |
wfjm |
4638d 21h |
/w11/tags/w11a_V0.6/rtl/sys_gen/ |
15 |
- interim release w11a_V0.54 (untagged)
- add Nexys3 port of w11a |
wfjm |
4657d 10h |
/w11/tags/w11a_V0.6/rtl/sys_gen/ |
13 |
- interim release w11a_V0.532 (untagged)
- re-organize modules 'human I/O' interface on Digilent boards
- add test designs for 'human I/O' interface for atlys,nexys2, and s3board
- small updates in crc8 and dcm areas
- with one exception all vhdl sources use now numeric_std |
wfjm |
4671d 19h |
/w11/tags/w11a_V0.6/rtl/sys_gen/ |
12 |
- interim release w11a_V0.531 (untagged)
- many small changes to prepare upcoming support for Spartan-6 and
usage of Cypress FX2 USB interface on nexys2/3 and atlys boards |
wfjm |
4740d 10h |
/w11/tags/w11a_V0.6/rtl/sys_gen/ |
10 |
- add sources for C++/Tcl based backend, add directories
- tools/src/...
- tools/tcl/...
- tools/dox
- tools/make
- add rlink test system
- rtl/sys_gen/tst_rlink/nexys2/... |
wfjm |
4903d 20h |
/w11/tags/w11a_V0.6/rtl/sys_gen/ |
9 |
- interim release w11a_V0.52 (untagged)
- migrate to rbus protocol verion 3
- reorganize rbus and rlink modules, many renames |
wfjm |
4993d 18h |
/w11/tags/w11a_V0.6/rtl/sys_gen/ |
8 |
- interim release w11a_V0.51 (untagged)
- migrate to ibus protocol verion 2
- nexys2 systems now with DCM derived system clock supported
- sys_w11a_n2 now runs with 58 MHz clksys |
wfjm |
5029d 08h |
/w11/tags/w11a_V0.6/rtl/sys_gen/ |
3 |
setup all svn:ignore props |
wfjm |
5170d 13h |
/w11/tags/w11a_V0.6/rtl/sys_gen/ |
2 |
initial source upload (no docs yet) |
wfjm |
5170d 13h |
/w11/tags/w11a_V0.6/rtl/sys_gen/ |