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[/] [w11/] [tags/] [w11a_V0.7/] [rtl/] [bplib/] - Rev 15

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Rev Log message Author Age Path
15 - interim release w11a_V0.54 (untagged)
- add Nexys3 port of w11a
wfjm 4587d 13h /w11/tags/w11a_V0.7/rtl/bplib/
13 - interim release w11a_V0.532 (untagged)
- re-organize modules 'human I/O' interface on Digilent boards
- add test designs for 'human I/O' interface for atlys,nexys2, and s3board
- small updates in crc8 and dcm areas
- with one exception all vhdl sources use now numeric_std
wfjm 4601d 22h /w11/tags/w11a_V0.7/rtl/bplib/
12 - interim release w11a_V0.531 (untagged)
- many small changes to prepare upcoming support for Spartan-6 and
usage of Cypress FX2 USB interface on nexys2/3 and atlys boards
wfjm 4670d 14h /w11/tags/w11a_V0.7/rtl/bplib/
10 - add sources for C++/Tcl based backend, add directories
- tools/src/...
- tools/tcl/...
- tools/dox
- tools/make
- add rlink test system
- rtl/sys_gen/tst_rlink/nexys2/...
wfjm 4833d 23h /w11/tags/w11a_V0.7/rtl/bplib/
9 - interim release w11a_V0.52 (untagged)
- migrate to rbus protocol verion 3
- reorganize rbus and rlink modules, many renames
wfjm 4923d 21h /w11/tags/w11a_V0.7/rtl/bplib/
8 - interim release w11a_V0.51 (untagged)
- migrate to ibus protocol verion 2
- nexys2 systems now with DCM derived system clock supported
- sys_w11a_n2 now runs with 58 MHz clksys
wfjm 4959d 11h /w11/tags/w11a_V0.7/rtl/bplib/
3 setup all svn:ignore props wfjm 5100d 16h /w11/tags/w11a_V0.7/rtl/bplib/
2 initial source upload (no docs yet) wfjm 5100d 16h /w11/tags/w11a_V0.7/rtl/bplib/

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