Rev |
Log message |
Author |
Age |
Path |
33 |
- major release w11a_V0.70 (tagged) |
wfjm |
3355d 07h |
/w11/tags/w11a_V0.7/rtl/bplib/bpgen/ |
29 |
- added support for Vivado
- added support for Nexys4 and Basys3 boards
- added RL11 disk support
- lots of documentation updated |
wfjm |
3459d 04h |
/w11/tags/w11a_V0.7/rtl/bplib/bpgen/ |
27 |
- migrate to rlink protocol version 4
- Goals for rlink v4
- 16 bit addresses (instead of 8 bit)
- more robust encoding, support for error recovery at transport level
- add features to reduce round trips
- improved attention handling
- new 'list abort' command
- For further details see README_Rlink_V4.txt
- use own C++ based tcl shell tclshcpp instead of tclsh |
wfjm |
3538d 07h |
/w11/tags/w11a_V0.7/rtl/bplib/bpgen/ |
25 |
- The div instruction gave wrong results in some corner cases when either
divisor or quotient were the largest negative integer (100000 or -32768).
This is corrected now, for details see ECO-026-div.txt
- some minor updates and fixes to support scripts
- xtwi usage and XTWI_PATH setup explained in INSTALL.txt |
wfjm |
3670d 09h |
/w11/tags/w11a_V0.7/rtl/bplib/bpgen/ |
22 |
- interim release w11a_V0.581 (untagged)
- new reference system
- switched from ISE 13.3 to 14.7.
- map/par behaviour changed, unfortunately unfavorably for w11a.
On Nexys3 no timing closure anymore for 80 MHz, only 72 MHz can
be achieved now.
- new man pages (in doc/man/man1/)
- support for Spartan-6 CMTs in PLL and DCM mode |
wfjm |
3743d 02h |
/w11/tags/w11a_V0.7/rtl/bplib/bpgen/ |
19 |
- interim release w11a_V0.562 (untagged)
- C++ and Tcl based backend server: many support classes for interfacing to
w11 system designs, and the associated Tcl bindings.
- add 'asm-11', a simple, Macro-11 syntax subset combatible, assembler.
- use now doxygen 1.8.3.1, generate c++,tcl, and vhdl source docs |
wfjm |
4154d 06h |
/w11/tags/w11a_V0.7/rtl/bplib/bpgen/ |
18 |
- interim release w11a_V0.561 (untagged)
- Added simple simulation model of Cypress FX2 and test benches for
functional verifcation of FX2 controller
- Bugfixes in FX2 firmware and controller, works now also on Nexys3 & Atlys
- Added test systems for rlink over USB verification for Nexys3 & Atlys |
wfjm |
4251d 07h |
/w11/tags/w11a_V0.7/rtl/bplib/bpgen/ |
17 |
- interim release w11a_V0.56 (untagged)
- re-organized handling of board and derived clocks in test benches
- added message filter definitions for some designs (.mfset files)
- added Cypress EZ-USB FX2 controller (USB interface)
- added firmware for EZ-USB FX2 supporting jtag access and data transfer
- FPGA configure over USB now supported directly in make build flow
- added test systems for USB testing and rlink over USB verification
- no functional change of w11a CPU core or any pre-existing test systems
- Note: Carefully read the disclaimer about usage of USB VID/PID numbers
in the file README_USB-VID-PID.txt. You'll be responsible for any
misuse of the defaults provided with the project sources !! |
wfjm |
4255d 02h |
/w11/tags/w11a_V0.7/rtl/bplib/bpgen/ |
13 |
- interim release w11a_V0.532 (untagged)
- re-organize modules 'human I/O' interface on Digilent boards
- add test designs for 'human I/O' interface for atlys,nexys2, and s3board
- small updates in crc8 and dcm areas
- with one exception all vhdl sources use now numeric_std |
wfjm |
4664d 11h |
/w11/tags/w11a_V0.7/rtl/bplib/bpgen/ |
12 |
- interim release w11a_V0.531 (untagged)
- many small changes to prepare upcoming support for Spartan-6 and
usage of Cypress FX2 USB interface on nexys2/3 and atlys boards |
wfjm |
4733d 03h |
/w11/tags/w11a_V0.7/rtl/bplib/bpgen/ |