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[/] [w11/] [tags/] [w11a_V0.7/] [rtl/] [sys_gen/] [tst_rlink/] [nexys3/] - Rev 36

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Rev Log message Author Age Path
33 - major release w11a_V0.70 (tagged) wfjm 3300d 17h /w11/tags/w11a_V0.7/rtl/sys_gen/tst_rlink/nexys3/
30 - added RH70/RP/RM big disk support
- many cleanups		 wfjm 3338d 16h /w11/tags/w11a_V0.7/rtl/sys_gen/tst_rlink/nexys3/
29 - added support for Vivado
- added support for Nexys4 and Basys3 boards
- added RL11 disk support
- lots of documentation updated		 wfjm 3404d 13h /w11/tags/w11a_V0.7/rtl/sys_gen/tst_rlink/nexys3/
27 - migrate to rlink protocol version 4
- Goals for rlink v4
- 16 bit addresses (instead of 8 bit)
- more robust encoding, support for error recovery at transport level
- add features to reduce round trips
- improved attention handling
- new 'list abort' command
- For further details see README_Rlink_V4.txt
- use own C++ based tcl shell tclshcpp instead of tclsh		 wfjm 3483d 16h /w11/tags/w11a_V0.7/rtl/sys_gen/tst_rlink/nexys3/
25 - The div instruction gave wrong results in some corner cases when either
divisor or quotient were the largest negative integer (100000 or -32768).
This is corrected now, for details see ECO-026-div.txt
- some minor updates and fixes to support scripts
- xtwi usage and XTWI_PATH setup explained in INSTALL.txt		 wfjm 3615d 18h /w11/tags/w11a_V0.7/rtl/sys_gen/tst_rlink/nexys3/
22 - interim release w11a_V0.581 (untagged)
- new reference system
- switched from ISE 13.3 to 14.7.
- map/par behaviour changed, unfortunately unfavorably for w11a.
On Nexys3 no timing closure anymore for 80 MHz, only 72 MHz can
be achieved now.
- new man pages (in doc/man/man1/)
- support for Spartan-6 CMTs in PLL and DCM mode		 wfjm 3688d 11h /w11/tags/w11a_V0.7/rtl/sys_gen/tst_rlink/nexys3/
19 - interim release w11a_V0.562 (untagged)
- C++ and Tcl based backend server: many support classes for interfacing to
w11 system designs, and the associated Tcl bindings.
- add 'asm-11', a simple, Macro-11 syntax subset combatible, assembler.
- use now doxygen 1.8.3.1, generate c++,tcl, and vhdl source docs		 wfjm 4099d 16h /w11/tags/w11a_V0.7/rtl/sys_gen/tst_rlink/nexys3/
17 - interim release w11a_V0.56 (untagged)
- re-organized handling of board and derived clocks in test benches
- added message filter definitions for some designs (.mfset files)
- added Cypress EZ-USB FX2 controller (USB interface)
- added firmware for EZ-USB FX2 supporting jtag access and data transfer
- FPGA configure over USB now supported directly in make build flow
- added test systems for USB testing and rlink over USB verification
- no functional change of w11a CPU core or any pre-existing test systems
- Note: Carefully read the disclaimer about usage of USB VID/PID numbers
in the file README_USB-VID-PID.txt. You'll be responsible for any
misuse of the defaults provided with the project sources !!		 wfjm 4200d 12h /w11/tags/w11a_V0.7/rtl/sys_gen/tst_rlink/nexys3/
16 - interim release w11a_V0.55 (untagged)
- added xon/xoff (software flow control) support to serport library
- added test systems for serport verification
- use new serport stack in sys_w11a_* and sys_tst_rlink_* systems		 wfjm 4576d 22h /w11/tags/w11a_V0.7/rtl/sys_gen/tst_rlink/nexys3/
15 - interim release w11a_V0.54 (untagged)
- add Nexys3 port of w11a		 wfjm 4595d 11h /w11/tags/w11a_V0.7/rtl/sys_gen/tst_rlink/nexys3/

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