URL https://opencores.org/ocsvn/wbuart32/wbuart32/trunk

Subversion Repositories wbuart32

[/] [wbuart32/] [trunk/] [bench/] [verilog/] - Rev 13

Rev	Log message	Author	Age	Path
13	Adjusted documentation of OPT_STANDALONE, and updated internal README files.	dgisselq	2672d 02h	/wbuart32/trunk/bench/verilog/
10	Adjusted for the new hardware flow control capability.	dgisselq	2672d 02h	/wbuart32/trunk/bench/verilog/
6	Lots of changes--see the git log for the full details.	dgisselq	2706d 08h	/wbuart32/trunk/bench/verilog/
5	Created independent peripheral, several toplevel tests, and updated documentation to match.	dgisselq	2716d 18h	/wbuart32/trunk/bench/verilog/
2	A first version to be checked in. The rxuart.v and txuart.v files have been well tested elsewhere, although the test setup here has not been as well tested. Still, type 'make test' in the base directory and you will get an assurance that the entire thing works--if you would like.	dgisselq	2850d 03h	/wbuart32/trunk/bench/verilog/