URL https://opencores.org/ocsvn/wishbone_uart_controller/wishbone_uart_controller/trunk

Subversion Repositories wishbone_uart_controller

[/] [wishbone_uart_controller/] [branches/] [uartcontroller/] [testbench/] - Rev 3

Rev	Log message	Author	Age	Path
3	this is the main code. read function has been tested on the fpga. next documentation in English.	themassau	4185d 01h	/wishbone_uart_controller/branches/uartcontroller/testbench/