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[/] [xgate/] [trunk/] - Rev 38

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Rev Log message Author Age Path
38 Nov 9 2009 update notes rehayes 5475d 10h /xgate/trunk/
37 RAM model breakout for testbench rehayes 5475d 10h /xgate/trunk/
36 Added bus arbitration for slave bus, but not fully functional yet. Added byte lane selects to task calls. rehayes 5475d 10h /xgate/trunk/
35 Add byte lane select input to all tasks rehayes 5475d 10h /xgate/trunk/
34 minor changes related to wishbone master interface rehayes 5475d 10h /xgate/trunk/
33 Update with some new pin information rehayes 5475d 10h /xgate/trunk/
32 added ram block rehayes 5475d 11h /xgate/trunk/
31 Cleanup for MAX_CHANNEL bus rehayes 5487d 05h /xgate/trunk/
30 Added pins debud_mode_i and secure_mode_i. Cleanup for xgif bus rehayes 5487d 05h /xgate/trunk/
29 Added some constant assigments, still needs more work to complete rehayes 5487d 05h /xgate/trunk/
28 Added comment line rehayes 5487d 06h /xgate/trunk/
27 Subversion test, no actual code changes rehayes 5500d 04h /xgate/trunk/
26 Add synopsys commands, add else defaults for semphore state machine. rehayes 5502d 07h /xgate/trunk/
25 Fix connected net name rehayes 5502d 07h /xgate/trunk/
24 Delete unused inputs rehayes 5502d 08h /xgate/trunk/
23 Oct 7, 2009 Update rehayes 5508d 05h /xgate/trunk/
22 Updated with figures and some new features rehayes 5508d 05h /xgate/trunk/
21 Added timeout, total error count, and XGCHN test rehayes 5508d 05h /xgate/trunk/
20 Added event signal for compare error tracking in top level test bench. rehayes 5508d 05h /xgate/trunk/
19 Verilog memory image for testing rehayes 5508d 05h /xgate/trunk/

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