OpenCores
URL https://opencores.org/ocsvn/xgate/xgate/trunk

Subversion Repositories xgate

[/] [xgate/] [trunk/] [doc/] - Rev 82

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
80 Added IRQ bypass registers and Test bench appendix rehayes 5197d 22h /xgate/trunk/doc/
79 Added IRQ bypass registers and Test bench appendix rehayes 5197d 22h /xgate/trunk/doc/
78 Added IRQ bypass registers and Test bench appendix rehayes 5197d 22h /xgate/trunk/doc/
70 Updated with interrupt bypass controll registers. rehayes 5227d 03h /xgate/trunk/doc/
55 Minor change to instruction set details. rehayes 5332d 03h /xgate/trunk/doc/
49 First pass with instruction set details rehayes 5347d 23h /xgate/trunk/doc/
46 Update to remove stack registers and add new register text. rehayes 5379d 22h /xgate/trunk/doc/
45 Update to remove stack registers and add new register text. rehayes 5379d 22h /xgate/trunk/doc/
41 Update for singel program counter added, WISHBONE Slave bus word addressability and byte selection rehayes 5382d 23h /xgate/trunk/doc/
33 Update with some new pin information rehayes 5411d 04h /xgate/trunk/doc/
22 Updated with figures and some new features rehayes 5443d 23h /xgate/trunk/doc/
5 Update for memory wait states, testbench and instruction decoder simplified for synthesis rehayes 5470d 23h /xgate/trunk/doc/
2 Initial Checkin rehayes 5478d 21h /xgate/trunk/doc/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.