URL https://opencores.org/ocsvn/xgate/xgate/trunk

Subversion Repositories xgate

[/] [xgate/] [trunk/] [rtl/] [verilog/] - Rev 16

Rev	Log message	Author	Age	Path
15	Fix R1 load at boot up, add debug features	rehayes	5423d 10h	/xgate/trunk/rtl/verilog/
12	Single step debug working, added software error interrupt output, added WISHBONE master module, fixed control register bits	rehayes	5424d 13h	/xgate/trunk/rtl/verilog/
5	Update for memory wait states, testbench and instruction decoder simplified for synthesis	rehayes	5437d 13h	/xgate/trunk/rtl/verilog/
2	Initial Checkin	rehayes	5445d 11h	/xgate/trunk/rtl/verilog/