URL https://opencores.org/ocsvn/xge_mac/xge_mac/trunk

Subversion Repositories xge_mac

[/] [xge_mac/] [trunk/] - Rev 22

Rev	Log message	Author	Age	Path
22	Added prototype system verilog testbench	antanguay	4363d 11h	/xge_mac/trunk/
21	Improvements for timing, adding alternate FIFO design using XIL define	antanguay	4363d 12h	/xge_mac/trunk/
20	Updates for Xilinx synthesis	antanguay	4653d 06h	/xge_mac/trunk/
19	Updates for 32/64 bit systems	antanguay	4828d 07h	/xge_mac/trunk/
18	Updates for linux 32-bit	antanguay	4829d 04h	/xge_mac/trunk/
17	Fixed deprecated SystemC warnings	antanguay	4831d 12h	/xge_mac/trunk/
16	Rename tb_xge_mac.v to sv extension to fix issue with newer Modelsim	antanguay	4831d 18h	/xge_mac/trunk/
15	Updated for Verilator 3.813	antanguay	4850d 18h	/xge_mac/trunk/
14	Change interface to big endian, added serdes examples to testbench	antanguay	5439d 13h	/xge_mac/trunk/
13	Change interface to big endian, added serdes examples to testbench	antanguay	5439d 13h	/xge_mac/trunk/
12	Change interface to big endian, added serdes examples to testbench	antanguay	5439d 14h	/xge_mac/trunk/
11	Fixed clock crossing	antanguay	5545d 11h	/xge_mac/trunk/
10	Added details to spec	antanguay	5643d 06h	/xge_mac/trunk/
7	New directory structure.	root	5717d 23h	/xge_mac/trunk/
6	Updated spec. Added mod[2:0] signals. Timing improvements.	antanguay	5994d 07h	/trunk/
5	Fixed compilation	antanguay	6000d 07h	/trunk/
4	Created	antanguay	6000d 10h	/trunk/
2	Initial revision	antanguay	6000d 11h	/trunk/
1	Standard project directories initialized by cvs2svn.		6000d 11h	/trunk/