URL https://opencores.org/ocsvn/xge_mac/xge_mac/trunk

Subversion Repositories xge_mac

[/] [xge_mac/] [trunk/] [rtl/] [include/] - Rev 28

Rev	Log message	Author	Age	Path
28	Adding parameter for max frame size	antanguay	4172d 01h	/xge_mac/trunk/rtl/include/
25	Timing improvements, reduced FIFO size from 1024 to 512	antanguay	4227d 02h	/xge_mac/trunk/rtl/include/
24	Use FIFO's for statistics clock domain crossing	antanguay	4227d 04h	/xge_mac/trunk/rtl/include/
23	Adding basic packet stats	antanguay	4227d 09h	/xge_mac/trunk/rtl/include/
22	Added prototype system verilog testbench	antanguay	4229d 06h	/xge_mac/trunk/rtl/include/
12	Change interface to big endian, added serdes examples to testbench	antanguay	5305d 08h	/xge_mac/trunk/rtl/include/
7	New directory structure.	root	5583d 18h	/xge_mac/trunk/rtl/include/
6	Updated spec. Added mod[2:0] signals. Timing improvements.	antanguay	5860d 01h	/xge_mac/trunk/rtl/include/
2	Initial revision	antanguay	5866d 05h	/xge_mac/trunk/rtl/include/