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[/] [xge_mac/] [trunk/] [tbench/] [verilog/] - Rev 12

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Rev Log message Author Age Path
12 Change interface to big endian, added serdes examples to testbench antanguay 5310d 20h /xge_mac/trunk/tbench/verilog/
11 Fixed clock crossing antanguay 5416d 17h /xge_mac/trunk/tbench/verilog/
7 New directory structure. root 5589d 05h /xge_mac/trunk/tbench/verilog/
6 Updated spec. Added mod[2:0] signals. Timing improvements. antanguay 5865d 13h /xge_mac/trunk/tbench/verilog/
2 Initial revision antanguay 5871d 16h /xge_mac/trunk/tbench/verilog/

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