URL https://opencores.org/ocsvn/xucpu/xucpu/trunk

Subversion Repositories xucpu

[/] [xucpu/] [trunk/] [src/] - Rev 23

Rev	Log message	Author	Age	Path
23	Currently moved test bench to 10 bit address. Created spreadsheet for filling memory with random data. When testing, memory is apparently not initialised.	lcdsgmtr	3294d 01h	/xucpu/trunk/src/
22	Update on makefile, because some parts are in other files.	lcdsgmtr	3294d 01h	/xucpu/trunk/src/
21	Since all BRAM is unified in one component, this testbench is not necessary anymore.	lcdsgmtr	3294d 01h	/xucpu/trunk/src/
20	Update RAM package to allow for 15-bit address. Update test bench to use address width parameter.	lcdsgmtr	3294d 01h	/xucpu/trunk/src/
19	Makefile for building memory block testbench.	lcdsgmtr	3294d 01h	/xucpu/trunk/src/
17	Moving the generic block ram component piece by piece to a better implementation.	lcdsgmtr	3294d 01h	/xucpu/trunk/src/
16	Re-write of memory in function of initial array memory blocks.	lcdsgmtr	3294d 01h	/xucpu/trunk/src/
15	Unification of all RAM parts into one interface.	lcdsgmtr	3294d 01h	/xucpu/trunk/src/
10	Correct build with GHDL.	lcdsgmtr	3426d 01h	/xucpu/trunk/src/
9	This makes sure that this GHDL configuration analyses correctly.	lcdsgmtr	3426d 01h	/xucpu/trunk/src/
8	Rebuilding the configuration to build the first system using GHDL.	lcdsgmtr	3427d 00h	/xucpu/trunk/src/
7	Moved package for initialising memory also to src.	lcdsgmtr	3427d 00h	/xucpu/trunk/src/
6	Removed some unnecessary files and directories. Moved other files to new directories.	lcdsgmtr	3427d 00h	/xucpu/trunk/src/
5	Re-organisation of repository.	lcdsgmtr	3428d 01h	/xucpu/trunk/src/