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28 Oops--two files needed by zipdbg weren't originally placed in the directory. dgisselq 3058d 19h /xulalx25soc/
27 Bug fix: the last_state register now correctly reflects all 5-bits of the state
machine. (Useful when detecting lockups ...)		 dgisselq 3058d 19h /xulalx25soc/
26 Some bug fixes, and the long jump early branching integration. dgisselq 3058d 19h /xulalx25soc/
25 Fixing compile time warnings. dgisselq 3058d 19h /xulalx25soc/
24 Added the #define necessary to enable (and clear) SCOPE interrupts. dgisselq 3064d 17h /xulalx25soc/
23 This fixes a bug in the early branching system, and clarifies that early
branch instructions will not affect the flags. It's a basic bug fix update.		 dgisselq 3067d 05h /xulalx25soc/
22 Added the mkdatev.pl file. (Oops!) dgisselq 3069d 21h /xulalx25soc/
21 Files, not links, to replace what were once broken links in this project. dgisselq 3120d 04h /xulalx25soc/
20 Documents, borrowed from their source projects, and reproduced here. These
describe the various components of the board.		 dgisselq 3120d 04h /xulalx25soc/
19 Step one in fixing soft link poblems. The following files were soft links,
and not brought into the svn repository properly. They'll be replaced in the
next update with their full sources.		 dgisselq 3120d 04h /xulalx25soc/
18 Got the bitfile back up to speed at 80 MHz. dgisselq 3123d 19h /xulalx25soc/
17 Some basic updates, to include adding in a missing file (zipstate). Most of
these updates include making sure that the XuLA2 device can be accessed via
the USB. (Prior versions accessed the FPGA via serial port or network ...)		 dgisselq 3123d 19h /xulalx25soc/
16 Updates to allow a test of the ICAP configuration interface. dgisselq 3123d 19h /xulalx25soc/
15 WORKING VERSION! ... or, at least the memory test works. dgisselq 3125d 15h /xulalx25soc/
14 Quick bug fix. dgisselq 3125d 15h /xulalx25soc/
13 This version is now working. (It probably would've worked before, but
everything is now working.)		 dgisselq 3125d 15h /xulalx25soc/
12 Modified to match the settings I'm now using within ISE. dgisselq 3125d 17h /xulalx25soc/
11 Getting software up and running on the board for the first time. (Not there
yet, but I think these items have now proven themselves.)		 dgisselq 3125d 17h /xulalx25soc/
10 Changed the name of the memtest.s file. dgisselq 3125d 17h /xulalx25soc/
9 Bug fixes, optimizations, etc. as part of building for an actual hardware
implementation. Most notably, the speed was lowered from 80MHz down to
76 MHz.		 dgisselq 3125d 17h /xulalx25soc/

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