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30 Bug fixes. In particular, this fixes a segmentation violation. dgisselq 3033d 12h /xulalx25soc/
29 This adds a vastly updated and superious ziprun capability to the repository.
ziprun now accepts ELF program files *only*, reads them, and places them onto
the board. This includes the ability, within the ELF file, of specifying
whether or not the data is sent to block ram, SD ram, or Flash, as well as
the ability of specifying the initial address. (Of course, that's a one time
thing--to always have the same initial address, set the address in
rtl/busmaster.v)		 dgisselq 3034d 04h /xulalx25soc/
28 Oops--two files needed by zipdbg weren't originally placed in the directory. dgisselq 3034d 08h /xulalx25soc/
27 Bug fix: the last_state register now correctly reflects all 5-bits of the state
machine. (Useful when detecting lockups ...)		 dgisselq 3034d 08h /xulalx25soc/
26 Some bug fixes, and the long jump early branching integration. dgisselq 3034d 08h /xulalx25soc/
25 Fixing compile time warnings. dgisselq 3034d 09h /xulalx25soc/
24 Added the #define necessary to enable (and clear) SCOPE interrupts. dgisselq 3040d 07h /xulalx25soc/
23 This fixes a bug in the early branching system, and clarifies that early
branch instructions will not affect the flags. It's a basic bug fix update.		 dgisselq 3042d 18h /xulalx25soc/
22 Added the mkdatev.pl file. (Oops!) dgisselq 3045d 11h /xulalx25soc/
21 Files, not links, to replace what were once broken links in this project. dgisselq 3095d 17h /xulalx25soc/
20 Documents, borrowed from their source projects, and reproduced here. These
describe the various components of the board.		 dgisselq 3095d 17h /xulalx25soc/
19 Step one in fixing soft link poblems. The following files were soft links,
and not brought into the svn repository properly. They'll be replaced in the
next update with their full sources.		 dgisselq 3095d 17h /xulalx25soc/
18 Got the bitfile back up to speed at 80 MHz. dgisselq 3099d 08h /xulalx25soc/
17 Some basic updates, to include adding in a missing file (zipstate). Most of
these updates include making sure that the XuLA2 device can be accessed via
the USB. (Prior versions accessed the FPGA via serial port or network ...)		 dgisselq 3099d 08h /xulalx25soc/
16 Updates to allow a test of the ICAP configuration interface. dgisselq 3099d 08h /xulalx25soc/
15 WORKING VERSION! ... or, at least the memory test works. dgisselq 3101d 04h /xulalx25soc/
14 Quick bug fix. dgisselq 3101d 04h /xulalx25soc/
13 This version is now working. (It probably would've worked before, but
everything is now working.)		 dgisselq 3101d 04h /xulalx25soc/
12 Modified to match the settings I'm now using within ISE. dgisselq 3101d 06h /xulalx25soc/
11 Getting software up and running on the board for the first time. (Not there
yet, but I think these items have now proven themselves.)		 dgisselq 3101d 06h /xulalx25soc/

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